[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [oc] Verilog coding style for Open Cores-RTL - Case in point SHA1
On Wednesday 28 May 2003 08:14 am, Rudolf Usselmann wrote:
> > Rudi, I agree with you here. OO works well in the test bench.
> > But for synthesizable RTL, how often you you code a StateMachine
> > class that inherits from BaseStateMachine and extend the Reset
> > and StateTransistion methods?
>
> Actually I think OO could work very well for synthesizable code
> as well. Interfaces definitions come to mind, that could be
> extended and overloaded etc. I could also envision writing IP
> cores that are later extended using OO techniques. I might
> offer different flavors of an IP core that I sell at different
> costs/configuration. Vera was not synthesizable, but I really
> liked some of it's OO constructs and believe they could be made
> synthesizable.
Good point about extendable interfaces. SystemVerilog is going in the
right direction in this regard. However, their are other ways to
define and extend interfaces other than using OO inheritance.
Confluence handles this using first class components (components that
can be passed into, or return from other components through ports).
For example, we can define a generic Wishbone interface that
implements the Wishbone Data Flow interconnection:
WbDataFlowInterface <-
comp +DataOp +BusIn -BusOut
(* Protocol logic here. *)
end
'BusIn' and 'BusOut' are clearly the input and output Wishbone buses.
'DataOp', on the other hand, is some generic operation (component)
that is appiled (instantiated) inside 'WbDataFlowInterface' to
implement a specific operation.
Want to create a wishbone component that simply NOTs incoming data?
{WbDataFlowInterface, `not BusIn, BusOut}
How about one that implements a filter?
{WbDataFlowInterface, FirFilter BusIn, BusOut}
Need a wishbone fast fourier transform? Not a problem:
{WbDataFlowInterface, FFT BusIn, BusOut}
Once used to higher-order data-types, there's all sorts of crazy
things one can do.
-Tom
--
Tom Hawkins
Launchbird Design Systems, Inc.
952-200-3790
tom1@launchbird.com
http://www.launchbird.com/
--
To unsubscribe from cores mailing list please visit http://www.opencores.org/mailinglists.shtml