Mail Index

• Thread Index

• Re: [oc] ACEX-board
  • From: Lars Segerlund <lars.segerlund@comsys.se>
• [oc] ACEX-board
  • From: "Chris" <chris.de.cleer@pandora.be>
• [oc] text to speech synthesis
  • From: Soban Shoeb Chawre <sobanc@nital.stpp.soft.net>
• Re: [oc] MP3 Encoder?
  • From: udhayakumars@hotmail.com
• Re: [oc] License issue about instset compatibility
  • From: Marko Mlinar <markom@opencores.org>
• Re: [oc] Altera flex 10k board
  • From: Lars Segerlund <lars.segerlund@comsys.se>
• Re: Re: [oc] PLL vs DLL
  • From: "robinluo" <robinluo@cytecht.com>
• Re: [oc] License issue about instset compatibility
  • From: John Dalton <john.dalton@bigfoot.com>
• RE: [oc] Altera flex 10k board
  • From: "Chris - ReDeTronics bvba" <online103219@online.be>
• [oc] re Possible problem with LGPL - advice ?
  • From: "MikeJ" <mikej@freeuk.com>
• Re: [oc] PLL vs DLL
  • From: Richard Herveille <richard@asics.ws>
• Re[2]: [oc] NEW PROJECT PROPOSAL(robotic arm controller )
  • From: Héctor Orón Martínez <hecormar@teleco.upv.es>
• Re: [oc] Altera flex 10k board
  • From: Héctor Orón Martínez <hecormar@teleco.upv.es>
• Re: [oc] PLL vs DLL
  • From: Héctor Orón Martínez <hecormar@teleco.upv.es>
• [oc] 8255 PPI source code
  • From: veenalakshmana_1980@rediffmail.com
• Re: [oc] Need some Help..
  • From: "sriramanan krishnamurthy" <sapota@hotmail.com>
• [oc] ACEX board ...
  • From: Lars Segerlund <lars.segerlund@comsys.se>
• [oc] Need a VHDL live project
  • From: ambati satish <satish2454@yahoo.co.in>
• [oc] Need some Help..
  • From: "Dharmeshbhai PATEL" <dpatel@ifrance.com>
• [oc] PLL vs DLL
  • From: "mayank digvijay bindal" <mayankbindal@rediffmail.com>
• Re: [oc] License issue about instset compatibility
  • From: anon@coward.com
• Re: [oc] License issue about instset compatibility
  • From: Niclas Hedhman <niclas@hedhman.org>
• Re: [oc] License issue about instset compatibility
  • From: nico <nico@seul.org>
• RE: [oc] CAN controller
  • From: "Igor Mohor\(opencores\)" <igorm@opencores.org>
• [oc] License issue about instset compatibility
  • From: Fabrizio Fazzino <fabrizio@fazzino.it>
• Re: [oc] CAN controller
  • From: Shehryar Shaheen <shehryar.shaheen@ul.ie>
• [oc] Altera flex 10k board
  • From: Lars Segerlund <lars.segerlund@comsys.se>
• [oc] CAN controller
  • From: Emmanuel Touloupis <E.Touloupis@lboro.ac.uk>
• Re: [oc] NEW PROJECT PROPOSAL(robotic arm controller )
  • From: vijaymuthu@yahoo.com
• [oc] Re: [openip] Possible problem with LGPL - advice ?
  • From: Richard Prescott <rip@step.polymtl.ca>
• [oc] Re: Possible problem with LGPL - advice ?
  • From: Andreas Bombe <bombe@informatik.tu-muenchen.de>
• Re: [oc] Possible problem with LGPL - advice ?
  • From: Rudolf Usselmann <rudi@asics.ws>
• [oc] Possible problem with LGPL - advice ?
  • From: "MikeJ" <mikej@freeuk.com>
• Re: [oc] CAN core finished.
  • From: Holger Baxmann <holger@bitwind.org>
• Re: [oc] CAN core finished.
  • From: Holger Baxmann <holger@bitwind.org>
• Re: [oc] CAN core finished.
  • From: Soban Shoeb Chawre <sobanc@nital.stpp.soft.net>
• Re: [oc] CAN core finished.
  • From: Soban Shoeb Chawre <sobanc@nital.stpp.soft.net>
• RE: [oc] CAN core finished.
  • From: "Igor Mohor\(opencores\)" <igorm@opencores.org>
• Re: [oc] CAN core finished.
  • From: Holger Baxmann <holger@bitwind.org>
• Re: [oc] CAN core finished
  • From: manxi wang <wangmanxi@yahoo.com>
• Re: [oc] CAN core finished.
  • From: Robinluo@cytecht.com
• [oc] CAN core finished.
  • From: "Igor Mohor\(opencores\)" <igorm@opencores.org>
• Re: [oc] Beyond Transmeta...
  • From: Niclas Hedhman <niclas@hedhman.org>
• Re: [oc] Repair of cells and metabolic functions
  • From: Ivan Guzvinec <ivang@flextronics.si>
• [oc] Repair of cells and metabolic functions
  • From: Enid Mansi <Georgetteofm@doramail.com>
• RE: [oc] Beyond Transmeta...
  • From: "Ho, Wen Jei x4297" <who1@rockwellcollins.com>
• Re: [oc] Beyond Transmeta...
  • From: Rudolf Usselmann <rudi@asics.ws>
• Re: [oc] Beyond Transmeta...
  • From: Niclas Hedhman <niclas@hedhman.org>
• Re: [oc] Beyond Transmeta...
  • From: "Jim Dempsey" <tapedisk@ameritech.net>
• Re: [oc] synthesis ...
  • From: Graham Seaman <graham@seul.org>
• Re: [oc] Beyond Transmeta...
  • From: Rudolf Usselmann <rudi@asics.ws>
• [oc] synthesis ...
  • From: Lars Segerlund <lars.segerlund@comsys.se>
• Re: [oc] Beyond Transmeta...
  • From: Lars Segerlund <lars.segerlund@comsys.se>
• [oc] Testbenching using IEEE 1029.1 WAVES vhdl packages. Is it useful ?
  • From: h.larsen@risoe.dk
• Re: [oc] Beyond Transmeta...
  • From: Niclas Hedhman <niclas@hedhman.org>
• Re: [oc] Beyond Transmeta...
  • From: Richard Herveille <richard@asics.ws>
• Re: [oc] Beyond Transmeta...
  • From: Lars Segerlund <lars.segerlund@comsys.se>
• Re: [oc] Beyond Transmeta...
  • From: Lars Segerlund <lars.segerlund@comsys.se>
• Re: [oc] Beyond Transmeta...
  • From: "Jim Dempsey" <tapedisk@ameritech.net>
• Re: [oc] Beyond Transmeta...
  • From: "Jim Dempsey" <tapedisk@ameritech.net>
• Re: [oc] Beyond Transmeta...
  • From: "Jim Dempsey" <tapedisk@ameritech.net>
• Re: [oc] Beyond Transmeta...
  • From: "Jim Dempsey" <tapedisk@ameritech.net>
• Re: [oc] Beyond Transmeta...
  • From: "Jim Dempsey" <tapedisk@ameritech.net>
• [oc] About MPEG & PCB Board
  • From: Héctor Orón Martínez <hecormar@teleco.upv.es>
• Re: [oc] Beyond Transmeta...
  • From: Lars Segerlund <lars.segerlund@comsys.se>
• Re: [oc] Beyond Transmeta...
  • From: Ivan Guzvinec <ivang@flextronics.si>
• Re: [oc] Beyond Transmeta...
  • From: Niclas Hedhman <niclas@hedhman.org>
• Re: [oc] Beyond Transmeta...
  • From: Lars Segerlund <lars.segerlund@comsys.se>
• Re: [oc] Beyond Transmeta...
  • From: "Martin.J Thompson" <Martin.J.Thompson@trw.com>
• Re: [oc] Beyond Transmeta...
  • From: Marko Mlinar <markom@opencores.org>
• Re: [oc] Beyond Transmeta...
  • From: Holger Baxmann <holger@bitwind.org>
• Re: [oc] Beyond Transmeta...
  • From: "Jim Dempsey" <tapedisk@ameritech.net>
• Re: [oc] fund transfer.
  • From: Holger Baxmann <holger@bitwind.org>
• Re: [oc] Beyond Transmeta...
  • From: Ivan Guzvinec <ivang@flextronics.si>
• Re: [oc] fund transfer.
  • From: Rudolf Usselmann <rudi@asics.ws>
• [oc] fund transfer.
  • From: "william ume" <kkalume@bluemail.ch>
• RE: [oc] hexadecimal
  • From: "Ho, Wen Jei x4297" <who1@rockwellcollins.com>
• Re: [oc] hexadecimal
  • From: Colin Marquardt <c.marquardt@alcatel.de>
• Re: [oc] Beyond Transmeta...
  • From: Marko Mlinar <markom@opencores.org>
• [oc] hexadecimal
  • From: demon_zhu <demon_zhu@sina.com>
• Re: [oc] Help::
  • From: "Jim Dempsey" <tapedisk@ameritech.net>
• RE: [oc] Help::
  • From: Tony Wang <twang@azanda.com>
• Re: [[oc] Help::]
  • From: Andras FERENCZ <aferencz@usa.net>
• Re: [oc] Beyond Transmeta...
  • From: "Jim Dempsey" <tapedisk@ameritech.net>
• [oc] CAN core finished
  • From: "Igor Mohor\(opencores\)" <igorm@opencores.org>
• Rep:Re: [oc] Help::
  • From: "Dharmeshbhai PATEL" <dpatel@ifrance.com>
• Re: [oc] Beyond Transmeta...
  • From: Marko Mlinar <markom@opencores.org>
• Re: [oc] need for project
  • From: "albert raj a" <allbut@lycos.com>
• Re: [oc] Verilog
  • From: Niclas Hedhman <niclas@hedhman.org>
• Re: [oc] Verilog
  • From: "Jim Dempsey" <tapedisk@ameritech.net>
• RE: [oc] Embedded FPGA Core Project...
  • From: Tony Wang <twang@azanda.com>
• RE: [oc] Verilog
  • From: Illan Glasner <IGlasner@mrv.com>
• Re: [oc] Beyond Transmeta...
  • From: "Jim Dempsey" <tapedisk@ameritech.net>
• [oc] Embedded FPGA Core Project...
  • From: "Knieser, Michael John" <mknieser@iupui.edu>
• Re: [oc] Beyond Transmeta...
  • From: Ivan Guzvinec <ivang@opencores.org>
• Re: [oc] Beyond Transmeta...
  • From: Ivan Guzvinec <ivang@flextronics.si>
• Re: [oc] Reed Solomon Encoder/decoder core requirements
  • From: ashishladdha@yahoo.com
• Re: [oc] Beyond Transmeta...
  • From: "Jim Dempsey" <tapedisk@ameritech.net>
• [oc] Verilog
  • From: "Ho, Wen Jei x4297" <who1@rockwellcollins.com>
• [oc] need for project
  • From: godwin gerald <godwin_gerald@yahoo.com>
• Re: [oc] Beyond Transmeta...
  • From: Lars Segerlund <lars.segerlund@comsys.se>
• Re: [oc] FFT algorithm
  • From: jiayuetang@hotmail.com
• Re: [oc] Help::
  • From: Colin Marquardt <c.marquardt@alcatel.de>
• [oc] Ethernet to & from telecom bus or HMVIP bus
  • From: R Rana <R.Rana@techpacindia.com>
• Re: [oc] Beyond Transmeta...
  • From: Rudolf Usselmann <rudi@asics.ws>
• Re: [oc] Beyond Transmeta...
  • From: "Jim Dempsey" <tapedisk@ameritech.net>
• Re: [oc] Beyond Transmeta...
  • From: mr.modman@email.cz
• [oc] FFT algorithm
  • From: rbatra5@rediffmail.com
• Re: [oc] Help::
  • From: Richard Herveille <richard@asics.ws>
• Re: [oc] Synthesizable T80 code problem
  • From: "MikeJ" <mikej@freeuk.com>
• Parameterizable Synthesizable Code (was [oc] Help::)
  • From: Jason Silcox <jsilcox@yahoo.com>
• [oc] Synthesizable T80 code problem
  • From: jelydonut@iraqmail.com
• [oc] Help::
  • From: "Dharmeshbhai PATEL" <dpatel@ifrance.com>
• [oc] verilog coding required
  • From: Ms rangashree jagan <mailshree82@yahoo.co.in>
• [oc] Re: Questions in DMA IP Core ?
  • From: Rudolf Usselmann <rudi@asics.ws>
• [oc] Questions in DMA IP Core ?
  • From: NansonHuang@itri.org.tw
• Re: [oc] SNR Calculation using CADENCE SpectreS tool
  • From: kiranpmys@yahoo.co.in
• [oc] Fwd:
  • From: "arun kumar saini" <arun_mnit@rediffmail.com>
• [oc] RE: CAN error question
  • From: "Igor Mohor\(opencores\)" <igorm@opencores.org>
• [oc] CAN error question
  • From: "Igor Mohor\(opencores\)" <igorm@opencores.org>
• Re: [oc] Design Question
  • From: John Sheahan <jrsheahan@optushome.com.au>
• Re: [oc] Design Question
  • From: Richard Herveille <richard@asics.ws>
• Re: [oc] Design Question
  • From: John Sheahan <jrsheahan@optushome.com.au>
• RE: [oc] Design Question
  • From: Victor Snesarev <vnsnes@yahoo.com>
• RE: [oc] Design Question
  • From: Rudolf Usselmann <rudi@asics.ws>
• RE: [oc] Design Question
  • From: "Ho, Wen Jei x4297" <who1@rockwellcollins.com>
• Re: [oc] Synthesizable Testbench
  • From: John Sheahan <jrsheahan@optushome.com.au>
• Re: [oc] Design Question
  • From: John Sheahan <jrsheahan@optushome.com.au>
• Re: [oc] Design Question
  • From: Richard Herveille <richard@asics.ws>
• Re: [oc] Bus sniffer
  • From: Holger Baxmann <holger@bitwind.org>
• [oc] Design Question
  • From: konstantinos_aris@hotmail.com
• [oc] Bus sniffer
  • From: glias@mixmail.com
• Re: [oc] Synthesizable Testbench
  • From: "tanveer tan" <tanveer008@rediffmail.com>
• Re: [oc] Can I get the sdram controller by FPGA? (VHDL)
  • From: myogananth@rediffmail.com.com