Gee thanks. That cach line size register was the thing I had missed. It resets to 0 just as the standard says. Now I have tried 4 and 8. I only get 2 word bursts though. Six words were prefetched. Funny... have to look into that. Best regards, Daniel -- To unsubscribe from pci mailing list please visit http://www.opencores.org/mailinglists.shtml