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Dear Everyone!
I have been doning simulation of rtl level.
But all output signal is unknown values when I used to
uploaded testbench and rtl source. Used tool is a Verilog-XL.
Anyone help me!
Best Regards!
G.W.Kim
ASIC Div. Sanghwa Micro Tech. Tel: 82-2-3453-7117 (#207) Fax: 82-2-3453-6834 ICQ #: 102436672 MSN: anf_gwkim@hotmail.com E-mail: gwkim@shmt.co.kr |
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