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Yes,
you're right.
First
of all I have to tell you that buffer descriptors (256 BD totally) arelocated
internally in the
eth.
MAC.
If you
take a look in the eth_top.v file, you'll find this:
assign
RegCs = wb_stb_i & wb_cyc_i & DWord & ~wb_adr_i[11] &
~wb_adr_i[10];
assign BDCs = wb_stb_i & wb_cyc_i & DWord & ~wb_adr_i[11] & wb_adr_i[10]; Transmit buffer descriptor addresses are fixed to address
where: ~wb_adr_i[11] & wb_adr_i[10]
This
means that Buffer descriptors might be between 0x400 and
0x800.
RX_BDBASE_ADDR is deleted (don't exists any more). RX_BD_NUM is new and
tells you how
many
buffer descriptors are used for RX BD. If you write
value 0x80 to this register
that
means that 128 BD are used for Rx BD while the rest 128 are used for Tx BD.
In
this case you have:
0x400
to 0x5FC Tx BD
0x600
to 0x7FC Rx BD
TX_STATUSn and RX_STATUSn registers don't exist any more. Status is
written back to the
buffer
descriptors and are avaliable from the addresses mentioned
above.
Regards,
Igor
-----Original Message-----
From: owner-ethmac@opencores.org [mailto:owner-ethmac@opencores.org]On Behalf Of Veeresh Sent: 5. februar 2001 8:59 To: ethmac@opencores.org Subject: Re: [ethmac] expecting help
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