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RE: [ethmac] Trouble with DMA



I tried the following replacement for the RAM block last month.  I was never
able to get Synplify to compile correctly though.  I got sidetracked on
other efforts and have not got back to this.

This is the statement I replaced each of the Xilinx RAMBlock(s) with:

// Altera Dual Port RAM for storing Tx and Rx buffer descriptors

lpm_ram_dpa RAM1 ( .q(WB_BDDataOut[31:0]),     .wrclock(WB_CLK_I),
.rdclock(WB_CLK_I),
                   .data(WB_DAT_I[31:0]),       .wren(~BDWe),
.rden(1'b1),
                   .wraddress(WB_ADR_I[9:2]),   .wrclocken(1'b1),
.rdclocken(1'b1),
                   .rdaddress(WB_ADR_I[9:2])  );

lpm_ram_dpa RAM2 ( .q(BDDataOut[31:0]),        .wrclock(WB_CLK_I),
.rdclock(WB_CLK_I),
                   .data(BDDataIn[31:0]),       .wren(~BDStatusWrite),
.rden(1'b1),
                   .wraddress(BDAddress[7:0]),  .wrclocken(1'b1),
.rdclocken(1'b1),
                   .rdaddress(BDAddress[7:0])  );

I then used Altera's Megawizzard to generate an lpm_ram_dpa.v 
file

I don't know how accurate this will be functionally, I just threw it
together so as to get through the compiling stage.

Hope this helps.
Jim




-----Original Message-----
From: Igor Mohor (uni-mb) [mailto:igor.mohor@uni-mb.si]
Sent: Tuesday, September 11, 2001 8:57 AM
To: ethmac@opencores.org
Subject: RE: [ethmac] Trouble with DMA


Tell me what are you using instead of the RAMB4_S16_S16 which is
BlockRAM within the Virtex. Are you sure that your RAM is working
correctly? That is the basic of the host - EthMAC interface.

I think that Jim was working with Altera's chips. Try to contact him
at: Jim Kjendalen [jimkje@adaptivemicro.com]

Regards,
	Igor



> -----Original Message-----
> From: owner-ethmac@opencores.org [mailto:owner-ethmac@opencores.org]On
> Behalf Of JohnJohn Fourie
> Sent: 11. september 2001 15:11
> To: ethmac@opencores.org
> Subject: [ethmac] Trouble with DMA
>
>
> Hallo
>
> I'm still having problems debugging the DMA wishbone.
> At the following command line I'm getting an error:
> assign WB_DAT_O[31:0] = BDRead ? WB_BDDataOut : RxData_wb;
> and the error are:
> Error: Node':1564.IN2' missing source
>
> Can you please help me solve this error. I'm working in MAXPLUS II
> software from Altera.
>
> Thank you
> John-John
>
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