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Re: [oc] New! FFT core



hi,
    I have written a test bench. I have pasted it below. I think it works
correctly, but pls check it and include it if you want in the source on the
web. The problem that I was facing was that I wasn't running it for enough
time. Was running it for 50000 ns with the clk period of 10 ns and the
output actually starts at 51300 ns. All I have done is the pre-synthesis
simulation. Haven't yet done a post synthesis simulation with this test
bench. Will do it in a day or two. Actually have been using this and trying
to make a 2 dimensional fft, since I need that for the Image Correlation
project I am working on. I have pasted the test bench below. Not sure if it
is the best one. But I think it works. Thank you very much for all the help.

library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_ARITH.all;
use std.textio.all;
use IEEE.std_logic_textio.all;

entity tb_cfft1024x12 is

end tb_cfft1024x12;

architecture tb of tb_cfft1024x12 is

component cfft1024X12
         port(
                 clk : in STD_LOGIC;
                 rst : in STD_LOGIC;
                 start : in STD_LOGIC;
                 inv : in std_logic;
                 Iin : in STD_LOGIC_VECTOR(11 downto 0);
                 Qin : in STD_LOGIC_VECTOR(11 downto 0);
                 inputbusy : out STD_LOGIC;
                 outdataen : out STD_LOGIC;
                 Iout : out STD_LOGIC_VECTOR(13 downto 0);
                 Qout : out STD_LOGIC_VECTOR(13 downto 0);
                 OutPosition : out STD_LOGIC_VECTOR( 9 downto 0 )
             );
end component;

signal  clk : STD_LOGIC;
signal  rst : STD_LOGIC;
signal  start : STD_LOGIC;
signal  inv : std_logic;
signal  Iin : STD_LOGIC_VECTOR(11 downto 0);
signal  Qin : STD_LOGIC_VECTOR(11 downto 0);
signal  inputbusy : STD_LOGIC;
signal  outdataen : STD_LOGIC;
signal  Iout : STD_LOGIC_VECTOR(13 downto 0);
signal  Qout : STD_LOGIC_VECTOR(13 downto 0);
signal  output_position:std_logic_vector(9 downto 0 );
constant clkprd : time:=10 ns;

begin
f: cfft1024x12 port map(clk=>clk,
                        rst =>rst,
                        start=> start,
                        inv=>inv,
                        Iin=>Iin,
                        Qin=>Qin,
                        inputbusy=>inputbusy,
                        outdataen=>outdataen,
                        Iout=>Iout,
                        Qout=>Qout,
                        OutPosition=>output_position);

clockgen: process
begin
        clk <= '1';
        wait for clkprd/2;
        clk <= '0';
        wait for clkprd/2;
end process;

fileread: process
file FileIn1 : text is in  "bindata"; -- bindata is a file containing 1-1024
in binary.
variable LineIn1   : line;
variable InputTmp1 :std_logic_vector(11 downto 0);
begin
                rst<='1';
                wait until clk'EVENT and clk='1';
                rst<='0';
                wait until clk'EVENT and clk='1';
                inv<='0';
                start<='1';
                wait until clk'EVENT and clk='1';
                start<='0';

                while  not( endfile( FileIn1)) loop
                        readline( FileIn1, LineIn1);
                        read(LineIn1, InputTmp1);
                        Iin<=InputTmp1;
                        Qin<="000000000000";
                        wait until clk'EVENT and clk='1';
                end loop;

                wait until outdataen'EVENT and outdataen='1';
                wait for 15000 ns;
end process;

end tb;





----- Original Message -----
From: <sradio@opencores.org>
To: <cores@opencores.org>
Sent: Sunday, November 17, 2002 1:13 AM
Subject: Re: [oc] New! FFT core


> Iin is real part of the input complex sequence, while Qin is the image
> part of the input complex sequence.
>
> You sould pay attension to the ouput order, which is radix 4 reversed
> order. And Iout is read part of the output complex sequence, while
> Qout is the image part of the output complex sequence.
>
> If I have sufficient time, I will write an another test bench.
>
> Sorry to confuse you.
>
> Good luck.
>
> ----- Original Message -----
> From: "Saumil Merchant" <msaumil@h... >
> To: <cores@o... >
> Date: Fri, 15 Nov 2002 03:38:21 -0500
> Subject: Re: [oc] New! FFT core
>
> >
> >
> > Hi,
> > I have been trying to use this fft code, but have been facing some
> > problems.
> > I actually don't really know much of this fft algorithm and I just
> > need to
> > use it considering it as a black box. Is it possible to get a test
> > bench for
> > this. If not could you please explain what are Iin and Qin. I mean
> > how does
> > your code expect the inputs to be? Some help will be really
> > appreciated.
> >
> > Thanks
> > Saumil
> >
> >
> > ----- Original Message -----
> > From: <sradio@o... >
> > To: <cores@o... >
> > Sent: Tuesday, October 29, 2002 8:13 AM
> > Subject: [oc] New! FFT core
> >
> >
> > > I have uploaded a new radix 4 complex FFT core, unfortunately
> > my
> > > english is very poor, I can not explain myself!
> > >
> > > The position of the core is /cfft/src.
> > >
> > >
> >
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