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Re: [oc] Altera.

To: cores@opencores.org
Subject: Re: [oc] Altera.
From: harshit.suri@st.com
Date: Mon, 11 Feb 2002 11:12:06 +0530
In-Reply-To: <1013195692.8168.3.camel@asic1.lowrance.com>
Reply-To: cores@opencores.org
Sender: owner-cores@opencores.org

     
     Hi Everyone
     
     i am currently working on FPGAs...and am facing a problem to get 
     synthesized net lists that are targeted to Xilinx FPGAs..please tell 
     me if they are any free / open source synthesis tools that can do the 
     same.I bascially need a synthesis tool that synthesises from RTL to 
     xilinx formats like (EDF/EDN/XNF..ect)..Thanks
     
     Harshit

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References:
- Re: [oc] Altera.
  - From: Jeff Hanoch <jeff@lowrance.com>

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