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RE: [oc] IDE/ATA-5 controller with DMA and Hard Disk support in Verilog?



Hi,

I haven't ported the core yet but have plans to do for the project I am
working on at the moment. I only use Verilog for HDL designs now and I
should be starting next week to convert it providing my current bus
controller design works.

Paul

> -----Original Message-----
> From: owner-cores@opencores.org [mailto:owner-cores@opencores.org]On
> Behalf Of Samit Ashdhir
> Sent: 08 February 2002 18:38
> To: cores@opencores.org
> Subject: [oc] IDE/ATA-5 controller with DMA and Hard Disk support in
> Verilog?
> 
> 
> Hi,
> 
> Has anyone ported Open Cores ATA/ATAPI-5 controller (OCIDEC-3) core in VHDL to
> Verilog? If so, could you please provide the same. I'm looking for the version 3
> of the OCIDEC in verilog, which has hard disk and DMA support. Or else does
> anyone know where it can be fetched from?
> 
> Thanks,
> Samit
> 
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