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Re: [oc] complex division in Hardware



You could be assigning a functional block for each of the terms in the 
numerator and the denominator, which would certainly require a lot of 
resources, I think you should use resource sharing techniques in order 
shrink your design a little, I suggest:

1 multiplier (or squaring hardware) for the denominator, you could use 
carry save adders if you need to improve speed.

2 multipliers for the numerator terms, where each 2 of the four terms 
(a*C , -b*d, a*d, & b*c) shall share a multiplier (same multiplication 
scheme should be used for denominator and numerator terms) 

Finally after a calculating the sums, you shall need to implement a 
division hardware (with a critical path equale to 2 multiplications)
Of course you should pipeline the division stage in order to obtain an 
overall critical path of 2 multiplications only.

I would like to point out that optimization options for such a system are 
quite diverse and you should be able to achieve a good performance-
size figure if you exam ine implementation options thouroghly.
Good luck.

KindestRegards,
Omar Shaheen
----- Original Message ----- 
From: Sridhar Nandula <sridhar.nandula@d... > 
To: cores@o...  
Date: Tue, 8 Jan 2002 14:47:33 +0530 
Subject: [oc] complex division in Hardware 

> 
> 
> hai , 
> Happy new year to you all. 
> I am implementing complex division in hardware. Is 
> there any easy method to do that? 
> As you know complex division can be done like this: 
> a+bi      a+bi      c-di      (a+bi) * (c-di) 
> ------ = ------- * ------- = -------------------- 
> c+di      c+di      c-di          c^2 + d^2 
> But it takes lot of hardware if we directly implement 
> it. Can some body suggest me some 
> equivalent algorithm or formula which mimics the same 
> functionality. Any usefull info in this 
> regard will be great help for me. 
> 
> Thanks in advance 
> Sridhar 
> 
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