Re: [oc] Re: ATA design

[Bernhard.Naegele@t-online.de (Bernhard Naegele)]

Hi Richard,
Is it possible, that you send me also what you have until now?

Bernhard Naegele
bernhard.naegele@t-online.de

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> Von: Richard Herveille <Richard.Herveille@pie.nl>
> An: daniel.haensse@freesurf.ch
> Cc: cores@opencores.org
> Betreff: [oc] Re: ATA design
> Datum: Donnerstag, 8. Februar 2001 10:32
> 
> Hi Dani,
> 
> Depends on what your goals are, if you just want to connect a harddisk
using
> PIO transfers (no UltraDMA or Multi-wordDMA transfers) than a Xilinx will
do
> fine. In fact all you need are some simple buffers. There are quite some
> examples in the net howto do this. There is one but, it's not compliant
with
> the ATA specs., but it works fine, I did it for a project.
> 
> Currently I am working on a full ATA-3 (and eventually a ATA-5) compliant
> core. I almost finished the PIO interface. This is the most important
> interface since all commands towards the ATA device are tranmitted using
PIO
> transfers. I can send you what I have sofar if you want to.
> 
> Richard
> 
> 
> > Hi Richard,
> >
> > I would like to interface a 68k uP to a Harddisk. I think it would be
> possible
> > to use a XILINX chip to do so. What is the state of your project?
> >
> > Dani
> >