I have some questions about usb2.0 PHY's digital parts: 1. Because of bit-unstuff , a 60M clk may be have not enough bit to get (may be 7-bit),how can I organize the timing of 480M and 60M? 2. when receiving,the 480M clk is synchronized to the data,the 60M clk is also synchronized to the data? -- To unsubscribe from usb mailing list please visit http://www.opencores.org/mailinglists.shtml