RE: [pci] TOP.v to TOP.sch

["Matt Schulte" <matts@commtech-fastcom.com>]

Nico:

I am in exactly the same situation, I only know VHDL not Verilog.  Is there
any way you could tell me how you have gotten as far as you have.  I am
having trouble even getting the project put together.

I am using a Spartan-II development board, and I would also like to attach
something simple to the WB bus so that I can see if I can make it work.

Thanks

Matt Schulte

--
To unsubscribe from pci mailing list please visit http://www.opencores.org/mailinglists.shtml