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[openrisc] or1ksim exception processing doesn't follow revised architecture
Hello!
According with the last version of the Architecture Manual, when a TRAP
exception occurs the EPCR should point to the next instruction, namely the
instruction following the "l.trap". But it seems that in or1ksim the EPCR
points to the "l.trap" instruction.
As this behaviour was changed from previous versions of the Architecture
Manual, I think is possible that the simulator has not been updated since
then.
Could you please tell me which is the correct value EPCR should have? And in
case or1ksim is wrong, is there any updated version?
Best regards,
Carlos Sanchez de La Lama <csanchez@teisa.unican.es>
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