Re: Re: [openrisc] or1200 sim

[jun_liu@mentor.com]

Hello, Damjan,

I'm still playing with the or1k simulation now. Since there is no flash.in 
under or1k/orp/orp_soc/sim/src, I have tried to play with or1k/mp3 
where there is a sample flash.in.

By using ModelSim, I instantiated the top level module. When I tried to 
run the design, there were two errors:
"Error, two or more masters currently accessing FLASH"
"Error, two or more masters currently accessing SRAM"
and when I continue run the simulation, it is alway "HiZ" at "flash.d"
Then what's possible source for the errors?

As for the installation of or32-rtems-* tools, could you give me some 
detailed instruction! I found it was not so straightforward.

Thank you very much!

Jun Liu


----- Original Message ----- 
From: Damjan Lampret <lampret@o... > 
To: openrisc@o...  
Date: Thu, 18 Apr 2002 21:43:08 CET 
Subject: Re: Re: [openrisc] or1200 sim 

> 
> 
> Hi ! 
> 
> I'm travelling right now, so I'll give you just some basic 
> information. 
> 
> RAMB* are found in Xilinx libraries. If your target is an ASIC, or 
> generic one, you can 
> comment out targets/memories type in or1200_defines.v. 
> ./src/flash.in is produced by sw/utils tools. Go to the sw/orp_mon 
> for example and hit 'make' and I believe it should produce a valid 
> flash.in file. Flash.in is the actual code you want to run on the 
> system. I will also put some sample flash.in files when I get home. 
> (for running 'make' you will have to install or32-rtems-* tools) 
> 
> I tested only with the memory interface, however in a separate 
> system the OR1200 was also tested with the Memory controller from 
> Rudi. 
> 
> regards, 
> Damjan 
> 
> On 17 Apr 2002 21:56 CET you wrote: 
> 
> > 
> > Thanks for your info! 
> > 
> > I've downloaded code under or1k/orp/orp_soc (except /sw). When 
> I try 
> > to run NcSim script, the first error is related with 
> "RAMB4_s8_s16". I 
> > thought it was something dependent on lower level Xilinx lib. 
> After 
> > commentting out the tag defined in "defines.v" files, I got 
> the "xess_top" 
> > instantiated in NcSim. When I begin to run the simulation, an 
> input 
> > file "/src/flash.in" is needed. So how can I get this file or 
> to get around 
> > of it? 
> > 
> > I try to run the simulation independent of any board or FPGA 
> libraries. Is 
> > there any other open Memery IP can be used in this sample SoC 
> design 
> > to load code? 
> > 
> > Thanks! 
> > 
> > Jun Liu 
> > 
> > > 
> > > Hello ! 
> > > 
> > > The or1200 now comes with the orp_soc environment. ORP 
> stands for 
> > > OpenRISC Reference Platform and orp_soc comes with a 
> basic set of 
> > > peripheral cores. OR1200 is part of the orp_soc and the 
> whole 
> > > simulation of the or1200 is now done via orp_soc. So 
> basically what 
> > > I'm saying is that or1200/sim will be removed since it is 
> obsolete. 
> > > You should download the or1k/orp_soc (or if you need a 
> specific 
> > > system for let say the XESS XSV800 board, you should 
> download the 
> > > or1k/xess). Before you start downloading, you might want 
> to check 
> > > out the directory structure via cvsweb because also the 
> uclinux is 
> > > linked under or1k/orp_soc/sw/uclinux and it might take a 
> while to 
> > > download the uclinux together with the ORP SOC. 
> > > 
> > > regards, 
> > > Damjan 
> > > 
> > > PS I'm travelling right now, so I hope I will be able to 
> help with 
> > > detailed instructions how to use the orp_soc (and update 
> the cvs) 
> > > in about 2 weeks. 
> > > 
> > > On 09 Apr 2002 00:35 CET you wrote: 
> > > 
> > > > Where can I get the required lib file to run 
> "run.sh" of 
> > > directory "sim"? 
> > > > Those files are: art_hssp_512x19, ... 
> > > > 
> > > > Thanks! 
> > > > 
> > > 
> > 
> 
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