Re: [openrisc] OR16 ISA

[jimmy87@sunplus.com.tw]

After I checked MIPS16 and SH2(Thumb not checked), I find that
MIPS16 has no lb/lh insn and SH2's lb/lh insn is kept by
two special registers, not coded in the insn.
If it's possible, I think we can keep only
{ "h.lhz",     "r8,N(rB)",   "0x0 NNNN 1000 BBBB"},
{ "h.lbz",     "r10,N(rB)",  "0x0 NNNN 1001 BBBB"},
{ "h.sh",      "N(rA),r8",   "0x1 NNNN AAAA 1000"},
{ "h.sb",      "N(rA),r9",   "0x1 NNNN AAAA 1001"},
Besides, we still have
{ "h.lwpain",  "rA,N",       "0x5 0x3  AAAA NNNN"},
{ "h.lhzpain", "rA,N",       "0x5 0x4  AAAA NNNN"},
{ "h.lbzpain", "rA,N",       "0x5 0x5  AAAA NNNN"},

{ "h.lhspain", "rA,N",       "0x5 0x6  AAAA NNNN"},
{ "h.lbspain", "rA,N",       "0x5 0x7  AAAA NNNN"},

{ "h.swpai",   "N,rB",       "0x6 0x3  NNNN BBBB"},
{ "h.shpai",   "N,rB",       "0x6 0x4  NNNN BBBB"},
{ "h.sbpai",   "N,rB",       "0x6 0x5  NNNN BBBB"},

{ "h.swpain",  "N,rB",       "0x6 0x6  NNNN BBBB"},
{ "h.shpain",  "N,rB",       "0x6 0x7  NNNN BBBB"},
{ "h.sbpain",  "N,rB",       "0x6 0x8  NNNN BBBB"},
and let r8 and r9 be the dedicated registers for halfword and byte respectively.
And I still strongly recommend the set, clear, test bit insns for the following
reasons:
1. These insns won't take lots of opcode code space.
2. These insns are useful at device handling if we want to test some bits of
some devices.
     Especially, some DSP processors have these insns.
3. If compiler can't support it, we can still use in-line assembly in C. After
all, we should
    let user in embedded worlds have more choices to create more powerful
programs.
4. After fixing OR16, I don't think in the future we will any good chance to add
 insn to OR32 or OR16.
    Because we still add insns, then OR16 ISA will still float and many other
users still have to update.
    After all, after MIPS-I or SH2 is fixed, they don't add any more insns to
those ISA. That'll make ISA
   unstable. So, I strongly suggest use as many encoding space as possible to
drive OR16 to the
   extreme.
Best regards, Jimmy





"Damjan Lampret" <lampret@opencores.org> 於 2000/05/25 06:08:36 PM

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主旨：    Re: [openrisc] OR16 ISA



> Not sure what exactly you mean. Which identification?
> ^^^ use it to identify it's not a word access.

But you have letters w, h and b for that. For example h.lw, h.lhX etc. (X is
either s or z for respective extension).

> I am not sure how useful are these. IIRC there is not special support in
GCC
> to use these insns (AFAIK and I am too lazy to check). They are useful if
> you write hand optimized assembly routines (optimized libraries).
> ^^^^^^^^^^^
> I think it's quite useful for embedded usage. In general purpose
> usage, it may not be helpful. But as you know, our first target is
> for embedded system. If you create more powerful insns, I think
> compact code and good performace can be achieved easily.
> Besides, embedded usage will often need to code assembly
> if the section is very critical.

Not easily, since you won't have a C compiler to use these insns. I think
they won't be commonly used insns therefore we should consider to eliminate
them and use encoding space for something better (you mentioned you need
more encoding space for load/store insns ;-).

regards,
Damjan