Re: [oc] Re: ARM core

[shengyu_shen@hotmail.com]

Hi Zhong

Are you reside in ChengDu? it is a famous university for electitric

----- Original Message ----- 
From: "Tao Zhong" <zhongtao@m... > 
To: <edwinb@i... > 
<cores@o... > 
Date: Wed, 3 Apr 2002 10:22:54 +0800 
Subject: [oc] Re: ARM core 

> 
> 
> Hi, 
> 
> The reason I chose SystemC as design language is that SystemC is 
> system 
> description language, 
> I am now studying on it. If you need verilog ARM core, you may go 
> to 
> nnARM(http://www.opencores.org/projects/nnARM/) . 
> 
> 
> I've designed a  5-pipeline as a framework. It works and now some 
> instructions can run on it, 
>  such as data processing instruction, branch instruction and 
> ldr/str. 
> 
> some codes are based or "stolen " from 
> swarm(http://www.dcs.gla.ac.uk/~michael/phd/swarm.shtml). If you 
> just want to 
> get a free simulator, maybe swarm is a choice. 
> 
> I'm  now trying to get the CVS work so I can upload the sources. 
> 
> thanks, 
> 
> Allen Tao Zhong 
> -- 
> University of Electronic Science and Technology  of China 
> zhong@o...  
> http://www.tianfu.net/~zhongtao 
> +80-028-3202346 
> +80-028-13980689358 
> 
> 
> -----Original Message----- 
> 发件人: edwinb@i...  <edwinb@i... > 
> 收件人: zhongtao@m...  
> <zhongtao@m... > 
> 日期: 2002年4月3日 5:21 
> 主题: ARM core 
> 
> 
> >Hi, 
> >   I'd love to see a GPL ARM core.  Let me know how your 
> progress 
> >comes along.  I'm doing StrongArm Linux development including a 
> board 
> >support package.  I don't have System C experience.  I'd love 
> to see 
> >this written in VHDL or Verilog.    Best of Success. 
> > 
> >Regards, 
> > 
> >Edwin Bland 
> > 
> 
--
To unsubscribe from cores mailing list please visit http://www.opencores.org/mailinglists.shtml