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desc
@@


1.1
log
@Initial revision
@
text
@<HTML><HEAD><TITLE>Xilinx Design Summary</TITLE></HEAD>
<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
<TABLE BORDER CELLSPACING=0 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
<TD COLSPAN='4'><B>CPU8080 Project Status</B></TD></TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
<TD>cpu8080.ise</TD>
<TD BGCOLOR='#FFFF99'><B>Current State:</B></TD>
<TD>Synthesized</TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Module Name:</B></TD>
<TD>testbench</TD>
<TD BGCOLOR='#FFFF99'><UL><LI><B>Errors:</B></LI></UL></TD>
<TD ALIGN=LEFT>No Errors</TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Target Device:</B></TD>
<TD>xc3s200-5pq208</TD>
<TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD>
<TD ALIGN=LEFT>No Warnings</TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD>
<TD>ISE 8.2.02i</TD>
<TD BGCOLOR='#FFFF99'><UL><LI><B>Updated:</B></LI></UL></TD>
<TD>Fri Oct 6 08:33:24 2006</TD>
</TR>
</TABLE>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='4'><B>CPU8080 Partition Summary</B></TD></TR>
<TR><TD COLSPAN='4'>No partition information was found.</TD></TR>
</TABLE>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='4'><B>Device Utilization Summary (estimated values)</B></TD></TR>
<TR ALIGN=CENTER BGCOLOR='#FFFF99'>
<TD ALIGN=LEFT><B>Logic Utilization</B></TD><TD><B>Used</B></TD><TD><B>Available</B></TD><TD><B>Utilization</B></TD></TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slices</TD>
<TD ALIGN=RIGHT>1139</TD>
<TD ALIGN=RIGHT>1920</TD>
<TD ALIGN=RIGHT>59%</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slice Flip Flops</TD>
<TD ALIGN=RIGHT>371</TD>
<TD ALIGN=RIGHT>3840</TD>
<TD ALIGN=RIGHT>9%</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of 4 input LUTs</TD>
<TD ALIGN=RIGHT>2153</TD>
<TD ALIGN=RIGHT>3840</TD>
<TD ALIGN=RIGHT>56%</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of bonded IOBs</TD>
<TD ALIGN=RIGHT>33</TD>
<TD ALIGN=RIGHT>141</TD>
<TD ALIGN=RIGHT>23%</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BRAMs</TD>
<TD ALIGN=RIGHT>1</TD>
<TD ALIGN=RIGHT>12</TD>
<TD ALIGN=RIGHT>8%</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of GCLKs</TD>
<TD ALIGN=RIGHT>2</TD>
<TD ALIGN=RIGHT>8</TD>
<TD ALIGN=RIGHT>25%</TD>
</TR>
</TABLE>

&nbsp;<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='6'><B>Detailed Reports</B></TD></TR>
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT><B>Infos</B></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Thu Oct 5 23:01:08 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD></TR>
<TR ALIGN=LEFT><TD>Translation Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>Map Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>Place and Route Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>Static Timing Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>Bitgen Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD></TR>
</TABLE>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='3'><B>Secondary Reports</B></TD></TR>
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD></TR>
<TR ALIGN=LEFT><TD>Xplorer Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD></TR>
</TABLE>
</BODY></HTML>@


1.1.1.1
log
@8080 CPU project
@
text
@@


1.1.1.2
log
@8080 CPU project
@
text
@d22 1
a22 1
<TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/*.xmsgs'>12 Warnings (0 filtered)</A></TD>
d28 1
a28 1
<TD>Fri Oct 20 22:33:56 2006</TD>
d40 1
a40 1
<TD ALIGN=RIGHT>1196</TD>
d42 1
a42 1
<TD ALIGN=RIGHT>62%</TD>
d45 1
a45 1
<TD ALIGN=RIGHT>403</TD>
d47 1
a47 1
<TD ALIGN=RIGHT>10%</TD>
d50 1
a50 1
<TD ALIGN=RIGHT>2253</TD>
d52 1
a52 1
<TD ALIGN=RIGHT>58%</TD>
d60 1
a60 1
<TD ALIGN=RIGHT>2</TD>
d62 1
a62 1
<TD ALIGN=RIGHT>16%</TD>
d75 1
a75 1
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Fri Oct 20 22:33:56 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/xst.xmsgs'>12 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/xst.xmsgs'>5 Infos (0 filtered)</A></TD></TR>
@


1.1.1.3
log
@8080 CPU project
@
text
@d10 1
a10 1
<TD>Programming File Generated</TD>
d20 1
a20 1
<TD>xc3s1000-4ft256</TD>
d22 1
a22 1
<TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/*.xmsgs'>182 Warnings (0 filtered)</A></TD>
d28 1
a28 1
<TD>Wed Nov 1 08:51:46 2006</TD>
d36 1
a36 1
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='5'><B>Device Utilization Summary</B></TD></TR>
d38 10
a47 19
<TD ALIGN=LEFT><B>Logic Utilization</B></TD><TD><B>Used</B></TD><TD><B>Available</B></TD><TD><B>Utilization</B></TD><TD><B>Note(s)</B></TD>
</TR>
<TR ALIGN=RIGHT BGCOLOR='#FFFF99'><TD ALIGN=LEFT><B>Total Number Slice Registers</B></TD>
<TD ALIGN=RIGHT>890</TD>
<TD ALIGN=RIGHT>15,360</TD>
<TD ALIGN=RIGHT>5%</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number used as Flip Flops</TD>
<TD ALIGN=RIGHT>802</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number used as Latches</TD>
<TD ALIGN=RIGHT>88</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
d50 8
a57 4
<TD ALIGN=RIGHT>3,884</TD>
<TD ALIGN=RIGHT>15,360</TD>
<TD ALIGN=RIGHT>25%</TD>
<TD>&nbsp;</TD>
d59 1
a59 58
<TR ALIGN=CENTER BGCOLOR='#FFFF99'>
<TD ALIGN=LEFT><B>Logic Distribution </B></TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of occupied Slices</TD>
<TD ALIGN=RIGHT>3,425</TD>
<TD ALIGN=RIGHT>7,680</TD>
<TD ALIGN=RIGHT>44%</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number of Slices containing only related logic</TD>
<TD ALIGN=RIGHT>3,425</TD>
<TD ALIGN=RIGHT>3,425</TD>
<TD ALIGN=RIGHT>100%</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number of Slices containing unrelated logic</TD>
<TD ALIGN=RIGHT>0</TD>
<TD ALIGN=RIGHT>3,425</TD>
<TD ALIGN=RIGHT>0%</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT BGCOLOR='#FFFF99'><TD ALIGN=LEFT><B>Total Number 4 input LUTs</B></TD>
<TD ALIGN=RIGHT>5,760</TD>
<TD ALIGN=RIGHT>15,360</TD>
<TD ALIGN=RIGHT>37%</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number used as logic</TD>
<TD ALIGN=RIGHT>3,884</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number used as a route-thru</TD>
<TD ALIGN=RIGHT>196</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number used for Dual Port RAMs</TD>
<TD ALIGN=RIGHT>1,680</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of bonded <A HREF_DISABLED='testbench_map.mrp?&DataKey=IOBProperties'>IOBs</A></TD>
<TD ALIGN=RIGHT>44</TD>
<TD ALIGN=RIGHT>173</TD>
<TD ALIGN=RIGHT>25%</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;IOB Flip Flops</TD>
<TD ALIGN=RIGHT>9</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Block RAMs</TD>
d61 2
a62 9
<TD ALIGN=RIGHT>24</TD>
<TD ALIGN=RIGHT>8%</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of MULT18X18s</TD>
<TD ALIGN=RIGHT>1</TD>
<TD ALIGN=RIGHT>24</TD>
<TD ALIGN=RIGHT>4%</TD>
<TD>&nbsp;</TD>
d65 1
a65 1
<TD ALIGN=RIGHT>3</TD>
d67 1
a67 35
<TD ALIGN=RIGHT>37%</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT BGCOLOR='#FFFF99'><TD ALIGN=LEFT><B>Total equivalent gate count for design</B></TD>
<TD ALIGN=RIGHT>278,010</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Additional JTAG gate count for IOBs</TD>
<TD ALIGN=RIGHT>2,112</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
</TR>
</TABLE>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='4'><B>Performance Summary</B></TD></TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Final Timing Score:</B></TD>
<TD>0</TD>
<TD BGCOLOR='#FFFF99'><B>Pinout Data:</B></TD>
<TD><A HREF_DISABLED='testbench.pad?&DataKey=PinoutData'>Pinout Report</A></TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Routing Results:</B></TD>
<TD><A HREF_DISABLED='testbench.unroutes'>All Signals Completely Routed</A></TD>
<TD BGCOLOR='#FFFF99'><B>Clock Data:</B></TD>
<TD><A HREF_DISABLED='testbench.par?&DataKey=ClocksData'>Clock Report</A></TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Timing Constraints:</B></TD>
<TD><A HREF_DISABLED='testbench.par?&DataKey=ConstraintsData'>All Constraints Met</A></TD>
<TD BGCOLOR='#FFFF99'><B>&nbsp;</B></TD>
<TD>&nbsp;</TD>
d70 1
d75 6
a80 6
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Wed Nov 1 08:45:16 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/xst.xmsgs'>167 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/xst.xmsgs'>10 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.bld'>Translation Report</A></TD><TD>Current</TD><TD>Wed Nov 1 08:45:26 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench_map.mrp'>Map Report</A></TD><TD>Current</TD><TD>Wed Nov 1 08:45:44 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/map.xmsgs'>9 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/map.xmsgs'>3 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.par'>Place and Route Report</A></TD><TD>Current</TD><TD>Wed Nov 1 08:51:14 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/par.xmsgs'>2 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/par.xmsgs'>2 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.twr'>Static Timing Report</A></TD><TD>Current</TD><TD>Wed Nov 1 08:51:26 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/trce.xmsgs'>2 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.bgn'>Bitgen Report</A></TD><TD>Current</TD><TD>Wed Nov 1 08:51:48 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/bitgen.xmsgs'>4 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT>0</TD></TR>
@


1.1.1.4
log
@8080 CPU project
@
text
@d22 1
a22 1
<TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/*.xmsgs'>171 Warnings (0 filtered)</A></TD>
d28 1
a28 1
<TD>Sat Nov 11 00:55:57 2006</TD>
d41 1
a41 1
<TD ALIGN=RIGHT>683</TD>
d43 1
a43 1
<TD ALIGN=RIGHT>4%</TD>
d47 1
a47 1
<TD ALIGN=RIGHT>595</TD>
d59 1
a59 1
<TD ALIGN=RIGHT>4,208</TD>
d61 1
a61 1
<TD ALIGN=RIGHT>27%</TD>
d68 1
a68 1
<TD ALIGN=RIGHT>3,312</TD>
d70 1
a70 1
<TD ALIGN=RIGHT>43%</TD>
d74 2
a75 2
<TD ALIGN=RIGHT>3,312</TD>
<TD ALIGN=RIGHT>3,312</TD>
d81 1
a81 1
<TD ALIGN=RIGHT>3,312</TD>
d86 1
a86 1
<TD ALIGN=RIGHT>6,094</TD>
d88 1
a88 1
<TD ALIGN=RIGHT>39%</TD>
d92 1
a92 1
<TD ALIGN=RIGHT>4,208</TD>
d98 1
a98 1
<TD ALIGN=RIGHT>206</TD>
d110 1
a110 1
<TD ALIGN=RIGHT>54</TD>
d112 1
a112 1
<TD ALIGN=RIGHT>31%</TD>
d116 1
a116 1
<TD ALIGN=RIGHT>11</TD>
d122 1
a122 1
<TD ALIGN=RIGHT>3</TD>
d124 1
a124 1
<TD ALIGN=RIGHT>12%</TD>
d134 1
a134 1
<TD ALIGN=RIGHT>2</TD>
d136 1
a136 1
<TD ALIGN=RIGHT>25%</TD>
d140 1
a140 1
<TD ALIGN=RIGHT>344,099</TD>
d146 1
a146 1
<TD ALIGN=RIGHT>2,592</TD>
d177 6
a182 6
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Sat Nov 11 00:49:18 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/xst.xmsgs'>155 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/xst.xmsgs'>15 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.bld'>Translation Report</A></TD><TD>Current</TD><TD>Sat Nov 11 00:49:28 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench_map.mrp'>Map Report</A></TD><TD>Current</TD><TD>Sat Nov 11 00:49:48 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/map.xmsgs'>10 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/map.xmsgs'>3 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.par'>Place and Route Report</A></TD><TD>Current</TD><TD>Sat Nov 11 00:55:22 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/par.xmsgs'>2 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/par.xmsgs'>3 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.twr'>Static Timing Report</A></TD><TD>Current</TD><TD>Sat Nov 11 00:55:34 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/trce.xmsgs'>2 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.bgn'>Bitgen Report</A></TD><TD>Current</TD><TD>Sat Nov 11 00:55:58 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/bitgen.xmsgs'>4 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT>0</TD></TR>
@


1.1.1.5
log
@8080 CPU project
@
text
@d22 1
a22 1
<TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/*.xmsgs'>184 Warnings (0 filtered)</A></TD>
d28 1
a28 1
<TD>Wed Nov 15 08:55:16 2006</TD>
d41 1
a41 1
<TD ALIGN=RIGHT>745</TD>
d47 1
a47 1
<TD ALIGN=RIGHT>657</TD>
d59 1
a59 1
<TD ALIGN=RIGHT>4,391</TD>
d61 1
a61 1
<TD ALIGN=RIGHT>28%</TD>
d68 1
a68 1
<TD ALIGN=RIGHT>3,458</TD>
d70 1
a70 1
<TD ALIGN=RIGHT>45%</TD>
d74 2
a75 2
<TD ALIGN=RIGHT>3,458</TD>
<TD ALIGN=RIGHT>3,458</TD>
d81 1
a81 1
<TD ALIGN=RIGHT>3,458</TD>
d86 1
a86 1
<TD ALIGN=RIGHT>6,313</TD>
d88 1
a88 1
<TD ALIGN=RIGHT>41%</TD>
d92 1
a92 1
<TD ALIGN=RIGHT>4,391</TD>
d98 1
a98 1
<TD ALIGN=RIGHT>242</TD>
d122 1
a122 1
<TD ALIGN=RIGHT>4</TD>
d124 1
a124 1
<TD ALIGN=RIGHT>16%</TD>
d128 1
a128 1
<TD ALIGN=RIGHT>2</TD>
d130 1
a130 1
<TD ALIGN=RIGHT>8%</TD>
d140 1
a140 1
<TD ALIGN=RIGHT>415,496</TD>
d177 6
a182 6
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Wed Nov 15 08:50:06 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/xst.xmsgs'>162 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/xst.xmsgs'>14 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.bld'>Translation Report</A></TD><TD>Current</TD><TD>Wed Nov 15 08:50:14 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench_map.mrp'>Map Report</A></TD><TD>Current</TD><TD>Wed Nov 15 08:50:32 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/map.xmsgs'>13 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/map.xmsgs'>3 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.par'>Place and Route Report</A></TD><TD>Current</TD><TD>Wed Nov 15 08:54:46 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/par.xmsgs'>2 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/par.xmsgs'>3 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.twr'>Static Timing Report</A></TD><TD>Current</TD><TD>Wed Nov 15 08:54:58 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/trce.xmsgs'>2 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.bgn'>Bitgen Report</A></TD><TD>Current</TD><TD>Wed Nov 15 08:55:18 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/bitgen.xmsgs'>7 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT>0</TD></TR>
@


1.1.1.6
log
@8080 CPU project
@
text
@d22 1
a22 1
<TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/*.xmsgs'>182 Warnings (0 filtered)</A></TD>
d28 1
a28 1
<TD>Thu Nov 16 20:16:53 2006</TD>
d41 1
a41 1
<TD ALIGN=RIGHT>744</TD>
d47 1
a47 1
<TD ALIGN=RIGHT>656</TD>
d59 1
a59 1
<TD ALIGN=RIGHT>4,397</TD>
d68 1
a68 1
<TD ALIGN=RIGHT>3,445</TD>
d70 1
a70 1
<TD ALIGN=RIGHT>44%</TD>
d74 2
a75 2
<TD ALIGN=RIGHT>3,445</TD>
<TD ALIGN=RIGHT>3,445</TD>
d81 1
a81 1
<TD ALIGN=RIGHT>3,445</TD>
d86 1
a86 1
<TD ALIGN=RIGHT>6,317</TD>
d92 1
a92 1
<TD ALIGN=RIGHT>4,397</TD>
d98 1
a98 1
<TD ALIGN=RIGHT>240</TD>
d140 1
a140 1
<TD ALIGN=RIGHT>415,467</TD>
d177 6
a182 6
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Thu Nov 16 20:11:26 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/xst.xmsgs'>162 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/xst.xmsgs'>14 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.bld'>Translation Report</A></TD><TD>Current</TD><TD>Thu Nov 16 20:11:34 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench_map.mrp'>Map Report</A></TD><TD>Current</TD><TD>Thu Nov 16 20:11:54 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/map.xmsgs'>10 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/map.xmsgs'>3 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.par'>Place and Route Report</A></TD><TD>Current</TD><TD>Thu Nov 16 20:16:20 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/par.xmsgs'>3 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/par.xmsgs'>3 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.twr'>Static Timing Report</A></TD><TD>Current</TD><TD>Thu Nov 16 20:16:34 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/trce.xmsgs'>2 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.bgn'>Bitgen Report</A></TD><TD>Current</TD><TD>Thu Nov 16 20:16:54 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/bitgen.xmsgs'>7 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT>0</TD></TR>
@


1.1.1.7
log
@8080 CPU project
@
text
@d22 1
a22 1
<TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/*.xmsgs'>185 Warnings (0 filtered)</A></TD>
d28 1
a28 1
<TD>Sat Nov 18 17:16:47 2006</TD>
d41 1
a41 1
<TD ALIGN=RIGHT>745</TD>
d47 1
a47 1
<TD ALIGN=RIGHT>657</TD>
d59 1
a59 1
<TD ALIGN=RIGHT>4,379</TD>
d68 1
a68 1
<TD ALIGN=RIGHT>3,447</TD>
d74 2
a75 2
<TD ALIGN=RIGHT>3,447</TD>
<TD ALIGN=RIGHT>3,447</TD>
d81 1
a81 1
<TD ALIGN=RIGHT>3,447</TD>
d86 1
a86 1
<TD ALIGN=RIGHT>6,300</TD>
d92 1
a92 1
<TD ALIGN=RIGHT>4,379</TD>
d98 1
a98 1
<TD ALIGN=RIGHT>241</TD>
d140 1
a140 1
<TD ALIGN=RIGHT>415,388</TD>
d177 6
a182 6
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Sat Nov 18 17:11:40 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/xst.xmsgs'>162 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/xst.xmsgs'>14 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.bld'>Translation Report</A></TD><TD>Current</TD><TD>Sat Nov 18 17:11:50 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench_map.mrp'>Map Report</A></TD><TD>Current</TD><TD>Sat Nov 18 17:12:12 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/map.xmsgs'>13 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/map.xmsgs'>3 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.par'>Place and Route Report</A></TD><TD>Current</TD><TD>Sat Nov 18 17:16:14 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/par.xmsgs'>3 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/par.xmsgs'>3 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.twr'>Static Timing Report</A></TD><TD>Current</TD><TD>Sat Nov 18 17:16:26 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/trce.xmsgs'>2 Infos (0 filtered)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.bgn'>Bitgen Report</A></TD><TD>Current</TD><TD>Sat Nov 18 17:16:48 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/bitgen.xmsgs'>7 Warnings (0 filtered)</A></TD><TD ALIGN=LEFT>0</TD></TR>
@


1.1.1.8
log
@8080 CPU project
@
text
@d10 1
a10 1
<TD>New</TD>
d16 1
a16 1
<TD>&nbsp;</TD>
d22 1
a22 1
<TD>&nbsp;</TD>
d28 1
a28 1
<TD>Sat Nov 18 22:46:58 2006</TD>
d35 138
a172 2


d177 6
a182 6
<TR ALIGN=LEFT><TD>Synthesis Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>Translation Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>Map Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>Place and Route Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>Static Timing Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>Bitgen Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD></TR>
@


