This example shows how to set up the LCD Controller in combination with an external analog monitor. Three configurations for the resoultions VGA 648x480, SVGA 800x600 and XVGA 1024X768 are available. Check your monitor specifications if it supports one of these configurations. If not the parameters can be adjusted (blanking, polarity ...). To choose a configuration uncomment one of the defines in the example code. #define CONF_640_480_60 -> VGA 640x480 @60Hz #define CONF_800_600_60 -> SVGA 800x600 @60Hz #define CONF_1024_768_60 -> XVGA 1024x768 @60Hz Before you run this application program the picture (AVR32.bmp) into the flash at address 0x00400000. Use for instance the avr32program application for this purpose. avr32program program -F bin -O 0x00400000 -evfcfi AVR32.bmp If this picture is not available a blank rectangle will be visible in the upper left corner. The pictures resolution is 320x240 (QVGA).
Definition in file lcdc_vga_example.c.
#include "usart.h"
#include "gpio.h"
#include "board.h"
#include "lcdc.h"
#include <string.h>
#include <avr32/io.h>
#include "sdramc_at32ap7000.h"
#include "ap7_errno.h"
#include "print_funcs.h"
#include "pm_at32ap7000.h"
#include "bmp_lib.h"
Go to the source code of this file.
Defines | |
#define | BITMAP_FILE_ADDRESS 0xA0400000 |
#define | CONF_1024_768_60 1024 |
#define | CONF_640_480_60 640 |
#define | CONF_800_600_60 800 |
#define | REFRESH_RATE 1170 |
#define | VGA_CONFIGURATION CONF_800_600_60 |
Functions | |
int | display_bm (lcdc_conf_t *lcdc_conf, void *file_start) |
void | fill_frame_buffer (lcdc_conf_t *lcdc_conf) |
Fill the frame buffer with a test picture. | |
void | lcdc_pio_config (void) |
Sets up the pins for the LCD on the STK1000. | |
int | main (void) |
Variables | |
static lcdc_conf_t | lcdc_1024_768_60_conf |
Configuration 1024x768 @60Hz. | |
static lcdc_conf_t | lcdc_800_600_60_conf |
Configuration VGA 800x600 @60Hz. | |
static lcdc_conf_t | lcdc_vga_std_conf |
Configuration 640x480 @60Hz. | |
volatile avr32_usart_t * | usart = &AVR32_USART1 |
#define BITMAP_FILE_ADDRESS 0xA0400000 |
#define CONF_1024_768_60 1024 |
#define CONF_640_480_60 640 |
#define CONF_800_600_60 800 |
#define REFRESH_RATE 1170 |
Definition at line 128 of file lcdc_vga_example.c.
#define VGA_CONFIGURATION CONF_800_600_60 |
int display_bm | ( | lcdc_conf_t * | lcdc_conf, | |
void * | file_start | |||
) |
Referenced by main().
void fill_frame_buffer | ( | lcdc_conf_t * | lcdc_conf | ) |
Fill the frame buffer with a test picture.
lcdc_conf | Pointer to LCD configuration structure |
Definition at line 296 of file lcdc_vga_example.c.
References lcdc_configuration_s::dmabaddr1, LCDC_BPP_16, LCDC_BPP_24, lcdc_configuration_s::pixelsize, lcdc_configuration_s::xres, and lcdc_configuration_s::yres.
Referenced by main().
00297 { 00298 unsigned int k,l,x,y; 00299 unsigned char * framePtr; 00300 00301 framePtr = (unsigned char *) (lcdc_conf->dmabaddr1 | 0xA0000000); 00302 00303 if(lcdc_conf->pixelsize == LCDC_BPP_24){ 00304 for (l=0; l < lcdc_conf->yres; l++){ 00305 for (k=0; k < lcdc_conf->xres; k++) 00306 { 00307 x = (256 * l) / lcdc_conf->yres; 00308 y = (256 * k) / lcdc_conf->xres; 00309 *framePtr++ = x; 00310 *framePtr++ = y; 00311 *framePtr++ = 256 - (x + y) / 2; 00312 } 00313 } 00314 } 00315 if(lcdc_conf->pixelsize == LCDC_BPP_16){ 00316 for (l=0; l < lcdc_conf->yres; l++){ 00317 for (k=0; k < lcdc_conf->xres; k++) 00318 { 00319 x = (32 * l) / lcdc_conf->yres; 00320 y = (32 * k) / lcdc_conf->xres; 00321 /* 1-5-5-5 format */ 00322 *framePtr++ = (x << 2) | (y >> 3); 00323 *framePtr++ = (y << 5) | (32 - (x + y) / 2); 00324 } 00325 } 00326 } 00327 }
void lcdc_pio_config | ( | void | ) |
Sets up the pins for the LCD on the STK1000.
Definition at line 253 of file lcdc_vga_example.c.
Referenced by main().
00253 { 00254 /* CC and MOD signals are not used for the video DAC and are not connected to 00255 * the monitor interface 00256 */ 00257 static const gpio_map_t lcdc_pio_map = { 00258 { AVR32_LCDC_DVAL_0_0_PIN, AVR32_LCDC_DVAL_0_0_FUNCTION }, 00259 { AVR32_LCDC_HSYNC_0_PIN, AVR32_LCDC_HSYNC_0_FUNCTION }, 00260 { AVR32_LCDC_PCLK_0_PIN, AVR32_LCDC_PCLK_0_FUNCTION }, 00261 { AVR32_LCDC_PWR_0_PIN, AVR32_LCDC_PWR_0_FUNCTION }, 00262 { AVR32_LCDC_VSYNC_0_PIN, AVR32_LCDC_VSYNC_0_FUNCTION }, 00263 { AVR32_LCDC_DATA_0_0_PIN, AVR32_LCDC_DATA_0_0_FUNCTION }, 00264 { AVR32_LCDC_DATA_1_0_PIN, AVR32_LCDC_DATA_1_0_FUNCTION }, 00265 { AVR32_LCDC_DATA_2_0_PIN, AVR32_LCDC_DATA_1_0_FUNCTION }, 00266 { AVR32_LCDC_DATA_3_0_PIN, AVR32_LCDC_DATA_1_0_FUNCTION }, 00267 { AVR32_LCDC_DATA_4_0_PIN, AVR32_LCDC_DATA_1_0_FUNCTION }, 00268 { AVR32_LCDC_DATA_5_PIN, AVR32_LCDC_DATA_5_FUNCTION }, 00269 { AVR32_LCDC_DATA_6_PIN, AVR32_LCDC_DATA_6_FUNCTION }, 00270 { AVR32_LCDC_DATA_7_PIN, AVR32_LCDC_DATA_7_FUNCTION }, 00271 { AVR32_LCDC_DATA_8_0_PIN, AVR32_LCDC_DATA_8_0_FUNCTION }, 00272 { AVR32_LCDC_DATA_9_0_PIN, AVR32_LCDC_DATA_9_0_FUNCTION }, 00273 { AVR32_LCDC_DATA_10_0_PIN, AVR32_LCDC_DATA_10_0_FUNCTION }, 00274 { AVR32_LCDC_DATA_11_0_PIN, AVR32_LCDC_DATA_11_0_FUNCTION }, 00275 { AVR32_LCDC_DATA_12_0_PIN, AVR32_LCDC_DATA_12_0_FUNCTION }, 00276 { AVR32_LCDC_DATA_13_PIN, AVR32_LCDC_DATA_13_FUNCTION }, 00277 { AVR32_LCDC_DATA_14_PIN, AVR32_LCDC_DATA_14_FUNCTION }, 00278 { AVR32_LCDC_DATA_15_PIN, AVR32_LCDC_DATA_15_FUNCTION }, 00279 { AVR32_LCDC_DATA_16_0_PIN, AVR32_LCDC_DATA_16_0_FUNCTION }, 00280 { AVR32_LCDC_DATA_17_0_PIN, AVR32_LCDC_DATA_17_0_FUNCTION }, 00281 { AVR32_LCDC_DATA_18_0_PIN, AVR32_LCDC_DATA_18_0_FUNCTION }, 00282 { AVR32_LCDC_DATA_19_0_PIN, AVR32_LCDC_DATA_19_0_FUNCTION }, 00283 { AVR32_LCDC_DATA_20_0_PIN, AVR32_LCDC_DATA_20_0_FUNCTION }, 00284 { AVR32_LCDC_DATA_21_0_PIN, AVR32_LCDC_DATA_21_0_FUNCTION }, 00285 { AVR32_LCDC_DATA_22_PIN, AVR32_LCDC_DATA_22_FUNCTION }, 00286 { AVR32_LCDC_DATA_23_PIN, AVR32_LCDC_DATA_23_FUNCTION } 00287 00288 }; 00289 gpio_enable_module(lcdc_pio_map, 31); 00290 }
int main | ( | void | ) |
Definition at line 329 of file lcdc_vga_example.c.
References BITMAP_FILE_ADDRESS, CONF_1024_768_60, CONF_640_480_60, CONF_800_600_60, display_bm(), lcdc_configuration_s::dmabaddr1, fill_frame_buffer(), lcdc_init(), lcdc_pio_config(), lcdc_configuration_s::pixelsize, VGA_CONFIGURATION, lcdc_configuration_s::xres, and lcdc_configuration_s::yres.
00330 { 00331 volatile struct avr32_smc_t *smc = &AVR32_SMC; 00332 lcdc_conf_t *lcdc_conf; 00333 00334 // Reset PM. Makes sure we get the expected clocking after a soft reset (e.g.: JTAG reset) 00335 pm_reset(); 00336 00337 /* set up SMC for higher frequencies */ 00338 smc->cs[0].mode = 0x00031103; 00339 smc->cs[0].cycle = 0x000c000d; 00340 smc->cs[0].pulse = 0x0b0a0906; 00341 smc->cs[0].setup = 0x00010002; 00342 00343 // Start PLL0 giving 150 MHz clock 00344 pm_pll_opt_t pll_opt = { 00345 .pll_id = 0, 00346 .mul = 15, 00347 .div = 2, 00348 .osc_id = 0, 00349 .count = 16, 00350 .wait_for_lock = 1, 00351 }; 00352 pm_start_pll(&pll_opt); 00353 00354 // Divide HSB by 2, PBB by 4 and PBA by 4 to keep them below maximum ratings 00355 pm_set_clock_domain_scaler(PM_HSB_DOMAIN, 2); 00356 pm_set_clock_domain_scaler(PM_PBB_DOMAIN, 4); 00357 pm_set_clock_domain_scaler(PM_PBA_DOMAIN, 4); 00358 00359 pm_set_mclk_source(PM_PLL0); 00360 00361 /* Initialize default debug usart */ 00362 init_dbg_rs232(pm_read_module_freq_hz(PM_PBA_USART1)); 00363 00364 sdramc_init(pm_read_module_freq_hz(PM_PBB_HSDRAMC)); 00365 00366 switch (VGA_CONFIGURATION) 00367 { 00368 case CONF_640_480_60: 00369 lcdc_conf = &lcdc_vga_std_conf; 00370 /* 25MHz pixel clock */ 00371 pll_opt.mul = 25; 00372 pll_opt.div = 12; 00373 break; 00374 case CONF_800_600_60: 00375 lcdc_conf = &lcdc_800_600_60_conf; 00376 /* 40 MHz pixel clock */ 00377 pll_opt.mul = 10; 00378 pll_opt.div = 3; 00379 break; 00380 case CONF_1024_768_60: 00381 lcdc_conf = &lcdc_1024_768_60_conf; 00382 /* 63,5 MHz pixel clock */ 00383 pll_opt.mul = 37; 00384 pll_opt.div = 7; 00385 break; 00386 default: 00387 print_dbg("Invalid or missing VGA configuration\n"); 00388 break; 00389 } 00390 00391 print_dbg( "Setting up PLL1 for LCD Controller\n"); 00392 print_dbg(" -> PLL1 ... "); 00393 pll_opt.pll_id = 1; 00394 pll_opt.osc_id = 1; 00395 pll_opt.count = 16; 00396 pm_start_pll(&pll_opt); 00397 print_dbg("OK\n"); 00398 00399 /* clear framebuffer */ 00400 memset((void *)lcdc_conf->dmabaddr1, 0, lcdc_conf->xres * lcdc_conf->yres * lcdc_conf->pixelsize / 8); 00401 00402 fill_frame_buffer(lcdc_conf); 00403 00404 display_bm(lcdc_conf, ((void *) BITMAP_FILE_ADDRESS)); 00405 00406 print_dbg("Setting up LCD controller\n"); 00407 lcdc_pio_config(); 00408 00409 /* Power manager setup 00410 * Enable CLOCK for LCDC in HSBMASK 00411 */ 00412 pm_enable_module(PM_HSB_LCDC); 00413 /* Feed generic clock for LCD Controller from PLL1 */ 00414 pm_gen_clk_opt_t gen_clk_opt = { 00415 .clock_source = PM_PLL1, 00416 .divider = 0, 00417 }; 00418 pm_start_generic_clock(7, &gen_clk_opt); 00419 00420 lcdc_init(lcdc_conf); 00421 print_dbg("Setup complete\n"); 00422 00423 while(1); 00424 }
lcdc_conf_t lcdc_1024_768_60_conf [static] |
lcdc_conf_t lcdc_800_600_60_conf [static] |
lcdc_conf_t lcdc_vga_std_conf [static] |
volatile avr32_usart_t* usart = &AVR32_USART1 |
Definition at line 130 of file lcdc_vga_example.c.