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Re: [usb] join



Hi Kinysh,

the purpose of the USB group is to create USB controller. But the group
needs someone who will lead the project. So if you are interested let
us know.

regards,
Damjan

--- kinysh <kinysh@sina.com> wrote:
> Hi: 
> 
> I have been doing ASIC design for two years. 
> I have been doing work on USB for a few month. My USB device
> controller is a simply one on FPGA. But it passes enumeration and can
> read & write data. 
> I am quiet interested in the usb design, especially for a stable and
> universal device/host controller. 
> By the way, I use verilog. 
> If I can help, please contact me. 
> 
> Bests 
> kinysh 
> ______________________________________
> 
> ===================================================================
> 新浪免费电子邮箱 http://mail.sina.com.cn
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> ATTACHMENT part 2 message/rfc822 
> Return-Path: kinysh<kinysh@sina.com>
> From: kinysh<kinysh@sina.com>
> To: usb@opencores.org_NOSPAM
> Subject: join
> Date: Thu Nov 30 08:41:26 2000
> X-Mailer: SinaMail 3.0Beta (FireToad)
> X-Priority: 3
> 
> Hi: 
> 
> I have been doing ASIC design for two years. 
> I have been doing work on USB for a few month. My USB device
> controller is a simply one on FPGA. But it passes enumeration and can
> read & write data. 
> I am quiet interested in the usb design, especially for a stable and
> universal device/host controller. 
> By the way, I use verilog. 
> If I can help, please contact me. 
> 
> Bests 
> kinysh 
> ______________________________________
> 
> ===================================================================
> 新浪免费电子邮箱 http://mail.sina.com.cn
> 新浪推出奥运短信息手机点播服务 
> http://sms.sina.com.cn/------------97626671614816SINAEMAIL-----
> 
> 
> 


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