RE: [usb] vhdl simulator for linux

[Lee Ainscough <Lee.Ainscough@pace.co.uk>]

I have been involved in a USB design, both master and slave.


It is a very interesting project to develop a USB host.

Usb is a bit of a tricky spec to get corrects, especially if, both modes
(fast and slow) are to be supported.



I have some recommendations:-


1)	Initially design it based around a simple micro interface, cs, data,
address, wr and read, Then the take it up the more higher interface level.
2)	Design the peripheral first. I.e. Use a PC to send data/ receive
data. (keep it simple). Support both slow and fast modes.
3)	Now do the Host. This is very complex.



Generally I would make a transmit and receive block connected to fifos.


Do a hardware state machine for times stamps etc.

Then Use a simple micro controller to control it.
	This works best as it's programmable, as there is a lot of hidden
things within the spec that are not defined very well.

PS The following block Diagram should help.


 <<Introduction.doc>> 


PS:- I'm working on getting you the source code for this.          A version
of the cost that never got completed. I have permission to release it, with
rules but open source.

I discussed that with Damjan earlier this year.

I have some rules that stop me releasing it to you immediately but I should
be able to do that soonish.


PS:- It's only the transmit and receive blocks (VHDL, see introduction.doc
).

I can not guarantee that they fully work but it should help you get a move
on.




I'm not really allowed to help with the project.

I'm working on that.


Regards.

Introduction.doc