Re: [pci] PCI bus in Quartus II 2.0??????

[Jeremy Andrus <jeremy@jeremya.com>]

On Thursday 25 July 2002 03:11 pm, klm681@mail.usask.ca wrote:
> Has anyone compiled the PCI bus IP core using Quartus II 2.0 software
> from Altera?  I tried, but I get this error message :"Unsupported
> Verilog HDL feature error: parameter value assignment in module
> instatiation is not supported".  It appears like this line is causing
> problems : WB_TPRAM #(`WB_FIFO_RAM_ADDR_LENGTH, 40) wbu_fifo_storage.
> Any ideas?  I don't really have the time to go through every module
> and correct errors...

I tried to compile the core in Quartus II v2.0 as well, and I got the 
same error message. I spent a little bit of time with it, but never got 
it to compile. My partner and I ended up just forking out the money for 
Altera's PCI core.

	-Jeremy

-- 
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Jeremy C. Andrus
http://www.jeremya.com/
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