Re: [openrisc] eCos & gcc bug

[Scott Furman <sfurman@rosum.com>]

Title:

Damjan Lampret wrote:
> Yes that's what I was thinking. So how did you do it?
The immediate jump range is roughly +-0x7FFFFFF bytes, so linking the
ROM starting at 0xF0000000 and the RAM at 0x00000000 wouldn't allow
immediate jumps between the two memory regions.  

Here's what I did instead:  The ROM image is linked starting at
0xFF000000 and RAM begins at 0x00000000.  I rely on aliasing of the ROM
image to place code at the reset vector, i.e. since decoded ROM space
is larger than ROM size.  The memory map looks like this:

ROM 'hFxxxxxxx	0xFF001000 - 0xFFFFFFFF	ROM-resident text and read-only data sections, executed in-place Code and data to be copied to RAM at boot
	0xFF000100 - 0xFF000FFF	Reset-handling and exception vector code, copied to RAM on boot
	0xF0000100 - 0xF0001000	Alias of reset and exception vectors.  On reset, jump to reset vector at 0xF0000100 which, in turn, jumps to startup code at 0xFF??????
RAM 'h0xxxxxxx	0x00001000	Code and data copied to here from ROM during boot
	0x00000100 - 0x00000FFF	Exception-handling code copied here from ROM during boot

I did have to add an option to sim.cfg to allow aliasing of the ROM
image to be simulated in or1ksim.  I can send a trivial patch for this
if you think others will use it.

-Scott