[fpu] Re: [[fpu] 回覆 : [[fpu] Me]]

["Damjan Lampret" <lampret@iskratel.si>]

> 1. types of instructions

Those recommended by IEEE-754 (or pehaps just a subset?).

> 2. should the FPU be generic or for OR1K processor?

I am writing OR1K architecture manual. I have left space for FP stuff but FP
registers are specified etc. So basically OR1K architecture assumes IEEE
compatible FP (single precision IEEE-754 compatible data types; for double
one needs 64-bit regs). I didn't try to define anything in architecture
since most modern FPUs use IEEE-754 and everything is quite the same (if you
check FP stuff in PowerPC you'll find it quite similar to other
architectures - which of course makes sense since they all use IEEE-754.).

> 3. mentassa size and exponenet size in bits

Specified by IEEE-754.

> 4. operations (addition, subtractions, mutilplications,division, MAC
> trigonometric functions

See 1.

> 5. compatibility with the IEEE standard?

Sure. In fact we need to define what parts of IEEE should be done in
software.

> 6. Intarnal architecture ( should it be based on integer operations so we
can
> use the integer processor and some kind of firmware to generate the
integer
> operations.

I think FPU should be quite standalone and optimized as much as possible for
fast FP operations.

regards, Damjan