[ethmac] The Ethernet MAC 10/100 Mbps Using

[Mykhaylo Serdyuk <serd@rishd.com>]

Hi!

We want to test Ethernet MAC 10/100 Mbps core.
But we have some difficulties with compiling the project with Altera
chips. On http://www.opencores.org/projects/ethmac/ written that
Ethernet MAC core was tested on Altera's NIOS board.

Can someone answer following questions:
1) What synthese tool you use for project compiling?
2) How many LEs the project occupies in Altera chips?

I have not a sufficient experience in Verilog HDL.
Can you help me (in some words) as it is correct to create project
and start compiling with Ethernet MAC 10/100 Mbps core?

Thank you for your help.

--- 
Best regards,                           "RISH Devices"
  Mykhaylo I. Serdyuk                      http://www.rishd.com
    H/W Designer                             E-mail: serd@rishd.com 

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