[ethmac] Ethernet on FPGA

["JohnJohn Fourie" <johnjohn_fourie@hotmail.com>]

>From: "Igor Mohor (uni-mb)" <igor.mohor@uni-mb.si>
>Reply-To: ethmac@opencores.org
>To: <ethmac@opencores.org>
>Subject: RE: [ethmac] wishbone dma bug
>Date: Tue, 7 Aug 2001 08:31:53 +0200
>
>Hi,
>
>You didn't say much what happened. Perhaps you forgot to set the include
>directory in
>the ModelSim. Tell me more what seems to be the problem (error messages,
>etc.)
>
>Regards,
>	Igor
>
> > -----Original Message-----
> > From: owner-ethmac@opencores.org [mailto:owner-ethmac@opencores.org]On
> > Behalf Of Hendra Gunawan
> > Sent: 07. avgust 2001 6:59
> > To: Igor Mohor (uni-mb)
> > Cc: ethmac@opencores.org
> > Subject: [ethmac] wishbone dma bug
> >
> >
> >
> >
> > hi'
> >
> > i compiled wishbonedma.v using ModelSim, but it didn't work. has anyone
> > got same problem too?
> >
> > thank you.
> >
> > --
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>
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>To unsubscribe from ethmac mailing list please visit Hallo.

I'm a student in my final year and doing a project on Ethernet.

My project description claims that I implement the Ethernet on a FPGA.
Is this a easy solution and where should I start?

I have the MAXPLUSII software and the ALTERA development kit. Where can I 
find the specs for the implementation and what components do you recommend 
to use for the physical layer?

John-John


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