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RE: Help with [ethmac]



Ok,


all the missing signals are now connected.

Before I continue I would like to know if somebody implemented the design in
the
Virtex and how much resources it took?

Signals Speed_stat and Duplex_stat were removed from the register since
this information can be obtained by reading the PHY status register
(through MIIM). Signal Scan_stat was also removed since this information
can be obtained directly by reading the r_ScanStat signal ib the registers.
This is bit[0] of the MIICOMMAND register.

There are still some warnings in the macstatus.v That will be connected in
next
day or two to the buffer descriptors. Ignore them at the moment.

Regards,
	Igor

> -----Original Message-----
> From: Jim Kjendalen [mailto:jimkje@adaptivemicro.com]
> Sent: 01. avgust 2001 17:44
> To: 'igorm@opencores.org'
> Subject: RE: Help with [ethmac]
>
>
> Hi again,
>
> I've gotten past the error:
> > "Multiple non-tristate drivers for net BDDataIn[31..0]"
>
> with changes to the Altera ramblock statments; most recent are included
> here.
>
>
> lpm_ram_dpa RAM1 ( .q(WB_BDDataOut[31:0]),     .wrclock(WB_CLK_I),
> .rdclock(WB_CLK_I),
>                   .data(WB_DAT_I[31:0]),       .wren(~BDWe),
> .rden(1'b1),
>                   .wraddress(WB_ADR_I[9:2]),   .wrclocken(1'b1),
> .rdclocken(1'b1),
>                   .rdaddress(WB_ADR_I[9:2])  );
>
>
> Alas, now there are complaints over the ethernettop.v section for undriven
> inputs at:
>
> Connecting Miim module:
>   Scan_stat
>   Mdi
>
>
> Connecting Ethernet registers:
>   Scan_stat
>   Speed_stat
>   Duplex_stat
>   UpdateMIIRX_DATAReg
>
>
> Thanks again,
> Jim
>
>
>
>
> -----Original Message-----
> From: Igor Mohor (uni-mb) [mailto:igor.mohor@uni-mb.si]
> Sent: Tuesday, July 31, 2001 6:25 PM
> To: Jim Kjendalen
> Subject: RE: Help with [ethmac]
>
>
> Hi, Jim,
>
> I have a feeling that signal data on your RAM is a bidirectional signal,
> right?
>
> That gives one driver besides mine driver.
>
> Regards,
> 	Igor
>
> > -----Original Message-----
> > From: Jim Kjendalen [mailto:jimkje@adaptivemicro.com]
> > Sent: 01. avgust 2001 0:31
> > To: 'igorm@opencores.org'
> > Subject: RE: Help with [ethmac]
> >
> >
> > Hi Igor,
> >
> > I've inserted an Altera LPM_RAM in place of the Xilinx.  The compiler
> > appears to get past it, but is now giving me another error.
> >
> > "Multiple non-tristate drivers for net BDDataIn[31..0]"
> >
> >
> >
> > This is the code that I substituted:
> >
> > lpm_ram_dp RAM1 ( .q(WB_BDDataOut[31:0]),
> .wrclock(WB_CLK_I),
> > .rdclock(WB_CLK_I),
> >                   .data(WB_DAT_I[31:0]),               .wren(~BDWe),
> > .rden(1'b1),
> >                   .wraddress({5'h0, WB_ADR_I[9:2]}),   .wrclken(1'b1),
> > .rdclken(1'b1),
> >                   .rdaddress({5'h0, WB_ADR_I[9:2]})  );
> >
> > lpm_ram_dp RAM2 ( .q(BDDataOut[31:0]),
> .wrclock(WB_CLK_I),
> > .rdclock(WB_CLK_I),
> >                   .data(BDDataIn[31:0]),
> > .wren(~BDStatusWrite),  .rden(1'b1),
> >                   .wraddress({5'h0, BDAddress[7:0]}),  .wrclken(1'b1),
> > .rdclken(1'b1),
> >                   .rdaddress({5'h0, BDAddress[7:0]})  );
> >
> >
> > I looked through the code for BDDataIn[31..] and was led to
> line 775 which
> > caught my attention.
> >
> > I don't know Verilog, never looked at it before today, just
> thought maybe
> > the ? was a placeholder where a small change was needed? I found
> > it used in
> > three places.
> >
> >
> > From line 680:
> > // Marks which bytes are valid within the word.
> > assign TxValidBytes = (TxLength >= 4)? 2'b0 : TxLength[1:0];
> >
> > From line 775:
> > assign BDDataIn  = TxStatusWrite ? {TxLength[15:0],
> > StatusIzTxEthMACModula}
> > : {RxLength, NewRxStatus};
> > assign BDStatusWrite = TxStatusWrite | RxStatusWrite;
> >
> > From line 1818:
> > // Selecting the data for the WISHBONE
> > assign WB_DAT_O[31:0] = BDRead? WB_BDDataOut : RxData_wb;
> >
> > Appreciate the help,
> > Jim
> >
> >
> > -----Original Message-----
> > From: Igor Mohor (uni-mb) [mailto:igor.mohor@uni-mb.si]
> > Sent: Tuesday, July 31, 2001 4:10 PM
> > To: Jim Kjendalen
> > Subject: RE: Help with [ethmac]
> >
> >
> >
> >
> > > -----Original Message-----
> > > From: Jim Kjendalen [mailto:jimkje@adaptivemicro.com]
> > > Sent: 31. julij 2001 22:58
> > > To: 'igorm@opencores.org'
> > > Subject: RE: Help with [ethmac]
> >
>

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