RE: [ethmac] Implementations / Status

["Igor Mohor (uni-mb)" <igor.mohor@uni-mb.si>]

Are you going to implement address recognition?

Regards,
	Igor

> -----Original Message-----
> From: owner-ethmac@opencores.org [mailto:owner-ethmac@opencores.org]On
> Behalf Of dantpt@hotmail.com
> Sent: 24. julij 2001 13:55
> To: ethmac@opencores.org
> Subject: RE: [ethmac] Implementations / Status
>
>
> see below 
>
> ----- Original Message -----
> From: igor dot mohor at uni-mb dot si
> To: ethmac at opencores dot org
> Date: Wed, 11 Jul 2001 14:28:26 +0200
> Subject: RE: [ethmac] Implementations / Status
>
> > I'm really close to the finish. I need few more days to
> > pack everything
> > together. I'm currently working on the host interface.
> >
> > You could do the address recognition system in the
> > meantime :)
> >
>
> I cannot see any status updates since this message, does this
> mean that the address recognition is still to be implemented, or
> is the MAC now complete.
>
> Also, re implementation; *has* anyone tried one yet? I may try
> one on an Altera FPGA and any info re size/problems etc would be v useful.
>
> last one(!); documentation mentions (p25) "WISHBONE DMA/Bridge
> Core spec" available on opencores.com. Is this simply a reference
> to the silicore.net wishbone SoC spec or is there another
> (implementation specific?!) document somewhere that I can't find?
>
> thanks, Dan.
>
>
> >
> >
> > Regards,
> > 	Igor
> >
> >
> > > -----Original Message-----
> > > From: <font class=email>owner-ethmac at opencores
> > dot org</font> [<A
> >
> href="/cgi-bin/post.cgi?cmd=new&to=owner-ethmac%20at%20opencores%2
> 0dot%20org&msg=/ml-archive/ethmac/msg00008.shtml">mailto:<font
> > class=email>owner-ethmac at opencores dot org</font>]On
> > > Behalf Of Christian Plessl
> > > Sent: 11. julij 2001 14:02
> > > To: <font class=email>ethmac at opencores dot
> > org</font>
> > > Subject: [ethmac] Implementations / Status
> > >
> > >
> > >
> > >
> > > Hi everyone
> > >
> > > Looking through the mailing lists archives I could
> > unfortunately not
> > > verify, what the current status of this project is
> > and whether
> > > anybody has
> > > tried to make an actual implementation. We're
> > thinking about using the
> > > ethermac core in a project and I'm evaluation
> > whether it is
> > > already usable
> > > or whether we have to use a commercial solution ;(
> > >
> > >
> > > Is anybody out there who has tried to implement the
> > ethmac core
> > > on an FPGA?
> > > What was your experience? Problems? How large is the
> > circuit
> > > implementation
> > > on FPGA (CLBs)?
> > >
> > > Best regards,
> > > Christian
> > >
> > > --
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> > > http://www.opencores.org/mailinglists.shtml
> > >
> >
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