[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[cvs-checkins] or1k/or1ksim cpu/or1k/spr_defs.h testbench/bas ...

To: cvs-checkins@opencores.org
Subject: [cvs-checkins] or1k/or1ksim cpu/or1k/spr_defs.h testbench/bas ...
From: OpenCores CVS Agent <cvs-checkins-agent@opencores.org>
Date: Thu, 8 Nov 2001 16:03:25 +0100
Sender: owner-cvs-checkins@opencores.org

CVSROOT:	/home/oc/cvs
Module name:	or1k
Changes by:	markom	01/11/08 16:03:25

Modified files:
	or1ksim/cpu/or1k: spr_defs.h 
	or1ksim/testbench: basic.s cbasic.c cfg.S local_global.c mul.c 
	                   test 
	or1ksim/testbench/support: spr_defs.h 

Log message:
	more tests run; added cfg capabilities for tests

--
To unsubscribe from cvs-checkins mailing list please visit http://www.opencores.org/mailinglists.shtml

Prev by Date: [cvs-checkins] uart16550/rtl/verilog uart_transmitter.v uart_ ...
Next by Date: [cvs-checkins] misc/generic_memories/rtl/verilog generic_dpram.v
Prev by thread: [cvs-checkins] misc/generic_memories/rtl/verilog generic_dpram.v
Next by thread: [cvs-checkins] uart16550/rtl/verilog uart_transmitter.v uart_ ...
Index(es):
- Date
- Thread