[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [oc] New! FFT core
Oh, jes I should have said I meant John Dalton !
Thanks for the Edits, may be Ming(sradio) can incorporate them ?
Cheers,
rudi
On Sunday 17 November 2002 23:00, John Dalton wrote:
> > After me, may be John can can do a final round of editing ? ;*)
>
> Did someone say my name? Does 'John' refer to me?
>
> If so, I don't mind doing an edit. My FFT core has been at a stand still
> for ages now, so if I can make a contribution by doing some editing, I'm
> glad to.
>
> A corrected version of the text from the document cfft/cfft_e.pdf is
> appended to this email.
>
> Regards
> John
>
> --------------------
>
> 1. Description
>
> CFFT is a radix-4 fast Fourier transform (FFT) core with configurable
> data width and a configurable number of sample points in the FFT.
>
> Twiddle factors are implemented using the CORDIC algorithm, causing the
> gain of the CFFT core to be different from the standard FFT algorithm.
> This variation in gain is not important for orthogonal frequency division
> modulation (OFDM) and demodulation. The gain can be corrected, to that of
> a conventional FFT, by applying a constant multiplying factor. The input
> to the FFT is naturally ordered {editor's note: have I interpreted this
> correctly?} while the output of the FFT is bit reversed,
>
> 2. Theory of Operation
>
> The reader is referred to one of the many explanations given in common
> textbooks. {editor's note: provide reference}
>
> 3. Block Diagram
>
> 4. Timing
>
> 5. Miscellaneous
>
> a. Gain
>
> Points Standard FFT CFFT Standard IFFT CFFT(inverse)
> 256 1 0.0698 1/256 17.9
> 1024 1 0.0287 1/1024 29.4
> 4096 1 0.0118 1/4096 48.2742
>
> b. Output Order
>
> The output sequence is bit reversed. For example, the 789th
> (1100010101(base 2)) output of a 1024 point FFT corresponds to a
> normalised frequency of 675/1024 (1010100011(base 2)).
>
> c. Synthesis
>
> This core can be synthesized using Synplify70. It can be placed and
> routed using Xilinx ISE4.1. A 1024 point FFT, with a 12 bit I/Q input can
> be fitted into an XCV50E-6 and runs at a clock speed of 90MHz.
--
rudi
------------------------------------------------
www.asics.ws - Solutions for your ASIC needs -
NEW ! 5 New Free IP Cores this months (so far :*)
FREE IP Cores --> http://www.asics.ws/ <---
----- ALL SPAM forwarded to: UCE@FTC.GOV -----
--
To unsubscribe from cores mailing list please visit http://www.opencores.org/mailinglists.shtml