Re: [[oc] Comparison between vhdl and Verilog..!!]

[Andras FERENCZ<aferencz@usa.net>]

Please, don't do that !

I've seen too many holy wars.
Look around on google, search for verilog vs vhdl, but don't expect an
objective comparison because there is no such thing.
Look around on comp.lang.vhdl and comp.lang.verilog, but don't ask this
question 'cause you might start some flamewars.

Best wishes,

Andras


Friman Sanchez Castaņo <fsanchez@ac.upc.es> wrote:
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> Hi everybody... do you know where can I find a very good and
> 
> objetive comparison between VHDL and Verilog???
> 
> Thanks!!
> 
> BYE..
> 
> Friman S.C.
> fsanchez@ac.upc.es
> 


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