[oc] PCI core - I can't synthesize.

["Jerzy Gbur" <furia1024@wp.pl>]

Hi

I tried to synthesize PCI core in Xilinx ISE 4.1, but it says that:

 

"ERROR:Xst:996 - wb_addr_mux.v Line 165. Undefined Text Substitution macro 'undef'
-->
EXEWRAP detected a return code of '6' from program 'C:/ISEFndtn/bin/nt/xst.exe'

 

Done: failed with exit code: 0006."

 

I'm not oriented in verilog, rather VHDL, I think that "'undef" is directive that ISE doesn't understand

or I should setup any of synthesize options?

How to resolve this?

 

Best regard

 

Jurek