[oc] TLB Design

["Ali Mashtizadeh" <ali@alikat.org>]

Title: Message

I am a High School student and most of my cpu design is working except I have problems makeing a TLB. I know I need a FSM and Memory but doesn't that mean it takes more than one clock cycle unless i put a delay lockup loop. So could someone help me. I'm not sure were to place the TLB and how to implement it.

 

Ali