Re: [oc] multiplier ( + suggestion for 'application notes')

[John Dalton <johnd@southern-poro.com>]

The definition of 'better' will vary depending on your constraints.

Actel publishes an application note about multipliers, which you
may find interesting.  They use an 'L-booth' algorithm.  It is
similar to what you described, but the first step is to form n*2
bit partial products, using a 4:1 multplexor.  I think other
FPGA manufacturers publish similar notes.

If area is of concern, but speed isn't, it is realistic to use a
bit serial approach.  In between is what I call a 'word-serial' approach
where a single parallel shift and add stage is reused.

Perhaps this could be an area in which opencores could do more work?
That is, write a set of 'application notes'.  They should be
vendor/technology
independent, covering techniques for both ASIC and FPGA.  An example
topic might be techniques for building multipliers, including state of the
art in
area, speed, power (+ so on) optimization.  Given time, and enough peer
review, the collected works might even turn into a classic free text on
ASIC/FPGA design??

Regards
John