on 2/4/01 20:13, Rocky at trekker@263.net wrote: I am now doing DMA(direct memory access)controller design in VHDL. I wonder if you could give me some advice or tell me where i could find something about it ,the better some open code. Thanks! Rocky, Check out my WISHBONE DMA/Bridge specification at: http://www.opencores.org/wishbone/cores/dma_doc.pdf rudi