[oc] I need a BUS! =)

[Alan Grimes <alangrimes@starpower.net>]

Hey, I'm the dude running the FreeProc project over at sourceforge...

My *current* vision for the thing calls for the thing to be a
single-module Computer... That is, it will be like a Slot X processor
but instead of cache, it will have RAM, well sorta... The system will be
built with these processor modules, as many as desired, The
interconnection bus will be arbitrated by the system's southbridge,
which will also manage the perifferal bus... 

The system will use a Cache Only Memory Architecture, (COMA), Each cache
page will also be a user level page, (4k), So the system must manage
coherency among all pages in the system and optomize based on the
settings in the page table, for example a Read Only page can be safely
mirrored locally on each processor but a read/write page should only
reside on one module, otherwise there would have to be massive
bus-trafic to keep it coherent among two users... 

The BUS protocol should also support hot-swapping, interprocessor
interrupts, and anything else needed/desired... I don't much care how
its done but it should be as invisible to the OS as possible... (The OS
will be of my own design, The penguin is going to have to blow me if he
wants support from my computer. ;)


-- 
Perhaps I will upgrade my OS from Win 3.11...
But It has to be more sophisticated than Win 3.11.
As well as less complicated than Win 3.11.
*AND* It must run on THE MACHINE!!!!
http://users.erols.com/alangrimes/  <my website.
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