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Hello,
I heard out this organization in EE Times. Sounds
like a great idea. I have a couple of FPGA designs under my belt and am looking
to learn from some of the elite designers out there. I've done most of my
designs in Verilog using Leonardo and MTI.
I have 10 yrs of experience in LAN/WAN (Ethernet,
ATM, T1/T3, Sonet). Lot of my time is going to be tied up with work( I joined a
startup recently). But I can probably put in a few hours a week. I this sounds
okay, put me to work.
Regards,
Manoj Viswambharan
Principal Hardware Engineer
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