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[oc] Hello!!
My name is Cheol-Ho Jeong, 
Korean. and Graduate student at Yonsei University.
 
I am VERY interested about your 
project.  I want to be a volunteer to your project.
 
I have 
a experience 
about FPU implementation in verilog. (multiplier & divider) 
 
and I hope to experience 
different functional block implementation such as
 
MAC or DSP block.  
 
And In the future, I hope to 
develop a 3D graphics accelerator..
 
PLEASE, answer my 
letter.
 
best 
regards..
 
p.s.. My home page : 
comsci.yonsei.ac.kr/~chjeong
        --> Still 
under construction..