[cdrom] Richard Goering Article on Design Process, EETIMES Jan 08, 2001

[VhdlCohen@aol.com]

 FYI, 
"Book models ASIC Design Process", Richard Goering, EETIMEs Jan 08, 2001 page 
62
Check scanned copy of article at: 
http://members.aol.com/vhdlcohen/vhdl/eet2.jpg

Ben

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Ben Cohen     Publisher, Trainer, Consultant    (310) 721-4830
http://www.vhdlcohen.com/                 vhdlcohen@aol.com  
Author of following textbooks: 
* Component Design by Example ... a Step-by-Step Process Using 
  VHDL with UART as Vehicle",  2001 isbn  0-9705394-0-1
* VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1
* VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115
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