/*
 *	linux/arch/i386/kernel/irq.c
 *
 *	Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
 *
 * This file contains the code used by various IRQ handling routines:
 * asking for different IRQ's should be done through these routines
 * instead of just grabbing them. Thus setups with different IRQ numbers
 * shouldn't result in any weird surprises, and installing new handlers
 * should be easier.
 */

/*
 * IRQs are in fact implemented a bit like signal handlers for the kernel.
 * Naturally it's not a 1:1 relation, but there are similarities.
 */

#include <linux/config.h>
#include <linux/ptrace.h>
#include <linux/errno.h>
#include <linux/kernel_stat.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/timex.h>
#include <linux/malloc.h>
#include <linux/random.h>
#include <linux/smp.h>
#include <linux/tasks.h>
#include <linux/smp_lock.h>
#include <linux/init.h>

#include <asm/system.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/bitops.h>
#include <asm/smp.h>
#include <asm/pgtable.h>
#include <asm/delay.h>
#include <asm/desc.h>
#include <asm/rtl_sync.h>


#include "irq.h"
#include <linux/cons.h>

/* tracer */
#ifdef CONFIG_RTL_TRACER
void rtl_trace_default(int event_id, long event_data, long eip) { }
void (*rtl_trace)(int event_id, long event_data, long eip) = rtl_trace_default;
#endif

/* Real Time Linux support */
unsigned int rtl_intercept(struct pt_regs r);
void rtl_emulate_enable_irq(unsigned int irq);
void rtl_emulate_disable_irq(unsigned int irq);
void rtl_emulate_shutdown_irq(unsigned int irq);
void rtl_emulate_startup_irq(unsigned int irq);
void rtl_make_sure_real_sti(const char *);

#define RTL_L_IDLE_BIT 1
#define RTL_L_IENABLE_BIT 4
#define RTL_L_SINCE_STI_BIT 8
#define RTL_L_IDLE_POS 0
#define RTL_L_IENABLE_POS 2
#define RTL_L_SINCE_STI_POS 3
#define is_soft_sti() (RTL_LOCAL.flags & RTL_L_IENABLE_BIT)
#define is_idle_realtime_system() (RTL_LOCAL.flags & RTL_L_IDLE_BIT)
#define set_idle_realtime_system() set_bit(RTL_L_IDLE_POS,&RTL_LOCAL.flags)
#define clear_idle_realtime_system() clear_bit(RTL_L_IDLE_POS,&RTL_LOCAL.flags)
#define soft_cli() clear_bit(RTL_L_IENABLE_POS,&RTL_LOCAL.flags)
#define soft_sti() set_bit(RTL_L_IENABLE_POS,&RTL_LOCAL.flags)

/* assuming 255 global irqs and 31 max local smp vectors */
#define IRQ_ARRAY_SIZE 4
#define IRQ_ZINIT {0}
#define IRQ_NZINIT {0xffffffff,0xffffffff,0xffffffff,0xffffffff}
/* fix if IRQ_ARRAY_SIZE !=4  */
#define irq_to_index(x)  ((x>>5)&3)
#define irq_to_pos(x)  ((x)& 0x1fUL)
#define irq_to_bit(x)  (1UL<< ((x) & 0x1f))
#define pos_and_index_to_irq(p,i) ( (p) + (i*32))
#ifdef __SMP__
struct rtl_local {
	__u32    flags;
	__u32    pending;
}rtl_local[NR_CPUS] = { {RTL_L_IDLE_BIT ,0},{RTL_L_IDLE_BIT,0}};
#define RTL_LOCAL rtl_local[cpu_id]
#define active_local_irqs() (RTL_LOCAL.pending)
#define active_irqs() (active_local_irqs() || active_global_irqs())
#define DeclareAndInit(cpu_id)  unsigned int cpu_id = smp_processor_id()
#define HardDeclareAndInit(cpu_id)  unsigned int cpu_id = hard_smp_processor_id()
void rtl_local_pend_vec(int vector,int cpu_id) {
		        int i = VECTOR_TO_LOCAL_PND(vector);
			set_bit(i,&(RTL_LOCAL.pending));
	                set_bit(RTL_L_SINCE_STI_POS, &RTL_LOCAL.flags);
}
#else
#define DeclareAndInit(cpu_id)
#define HardDeclareAndInit(cpu_id)
struct rtl_local {
	__u32 flags;
} rtl_local = {RTL_L_IENABLE_BIT | RTL_L_IDLE_BIT};
#define RTL_LOCAL rtl_local
#endif


struct rtl_global{
	spinlock_t hard_irq_controller_lock;
	unsigned int rtl_off;
	unsigned int pending[IRQ_ARRAY_SIZE];
	unsigned int soft_enabled[IRQ_ARRAY_SIZE];
	unsigned int rt_system_is_idle;
	unsigned int rtirq[IRQ_ARRAY_SIZE];
	unsigned int pended_since_sti;
};
struct rtl_global rtl_global ={ SPIN_LOCK_UNLOCKED,1,IRQ_ZINIT,IRQ_NZINIT,1,IRQ_ZINIT,0} ;

/* macros for touching the global structure */
#define test_g(ix,y) test_bit(irq_to_pos(ix),&y[irq_to_index(ix)])
#define global_is_pending_irq(ix) test_g(ix,rtl_global.pending)
#define global_is_enabled_irq(ix) test_g(ix,rtl_global.soft_enabled)
#define there_is_a_rt_handler(ix) test_g(ix,rtl_global.rtirq) 
#define global_pend_irq(ix)\
       set_bit(irq_to_pos(ix),&rtl_global.pending[irq_to_index(ix)])
#define global_unpend_irq(ix) \
	{clear_bit(irq_to_pos(ix),&rtl_global.pending[irq_to_index(ix)]);}
#define atomic_global_soft_disable(x) \
      clear_bit(irq_to_pos(x),&rtl_global.soft_enabled[irq_to_index(x)]);
#define global_soft_enable(x) \
      set_bit(irq_to_pos(x),&rtl_global.soft_enabled[irq_to_index(x)]);



/* this are exported so that they can be called by rt drivers */
void rtl_global_pend_irq(int ix) { global_pend_irq(ix);}
void rtl_hard_enable_irq(unsigned int ix) { 
	int flags;
       	rtl_hard_savef_and_cli(flags);
	rtl_spin_lock(&rtl_global.hard_irq_controller_lock);
	irq_desc[ix].handler->enable(ix);
	rtl_spin_unlock(&rtl_global.hard_irq_controller_lock);
	rtl_hard_restore_flags(flags);
}
void rtl_hard_disable_irq(unsigned int ix) { 
	int flags;
       	rtl_hard_savef_and_cli(flags);
	rtl_spin_lock(&rtl_global.hard_irq_controller_lock);
	irq_desc[ix].handler->disable(ix);
	rtl_spin_unlock(&rtl_global.hard_irq_controller_lock);
	rtl_hard_restore_flags(flags);
}
 
unsigned int rtl_rt_system_is_idle(){ 
	HardDeclareAndInit(cpu_id);
	return is_idle_realtime_system();
}
/* needs to be called with irqs disabled */
void rtl_make_rt_system_active(){ 
	HardDeclareAndInit(cpu_id);
	clear_idle_realtime_system();
}
/* needs to be called with irqs disabled */
void rtl_make_rt_system_idle(){ 
	HardDeclareAndInit(cpu_id);
	set_idle_realtime_system();
}

unsigned int local_bh_count[NR_CPUS];
unsigned int local_irq_count[NR_CPUS];

atomic_t nmi_counter;

/*
 * Linux has a controller-independent x86 interrupt architecture.
 * every controller has a 'controller-template', that is used
 * by the main code to do the right thing. Each driver-visible
 * interrupt source is transparently wired to the apropriate
 * controller. Thus drivers need not be aware of the
 * interrupt-controller.
 *
 * Various interrupt controllers we handle: 8259 PIC, SMP IO-APIC,
 * PIIX4's internal 8259 PIC and SGI's Visual Workstation Cobalt (IO-)APIC.
 * (IO-APICs assumed to be messaging to Pentium local-APICs)
 *
 * the code is designed to be easily extended with new/different
 * interrupt controllers, without having to do assembly magic.
 */

/*
 * Micro-access to controllers is serialized over the whole
 * system. We never hold this lock when we call the actual
 * IRQ handler.
 */
spinlock_t irq_controller_lock;

/*
 * Dummy controller type for unused interrupts
 */
static void do_none(unsigned int irq, struct pt_regs * regs)
{
	/*
	 * we are careful. While for ISA irqs it's common to happen
	 * outside of any driver (think autodetection), this is not
	 * at all nice for PCI interrupts. So we are stricter and
	 * print a warning when such spurious interrupts happen.
	 * Spurious interrupts can confuse other drivers if the PCI
	 * IRQ line is shared.
	 *
	 * Such spurious interrupts are either driver bugs, or
	 * sometimes hw (chipset) bugs.
	 */
	printk("unexpected IRQ vector %d on CPU#%d!\n",irq, smp_processor_id());

#ifdef __SMP__
	/*
	 * [currently unexpected vectors happen only on SMP and APIC.
	 *  if we want to have non-APIC and non-8259A controllers
	 *  in the future with unexpected vectors, this ack should
	 *  probably be made controller-specific.]
	 */
	ack_APIC_irq();
#endif
}
static void enable_none(unsigned int irq) { }
static void disable_none(unsigned int irq) { }

/* startup is the same as "enable", shutdown is same as "disable" */
#define startup_none	enable_none
#define shutdown_none	disable_none

struct hw_interrupt_type no_irq_type = {
	"none",
	startup_none,
	shutdown_none,
	do_none,
	enable_none,
	disable_none,0
};

/*
 * Dummy controller type for RTL soft interrupts
 */
static void rtl_do_none(unsigned int irq, struct pt_regs * regs)
{
	struct irqaction * action;
	irq_desc_t *desc = irq_desc + irq;

	action = desc->action;
	if (!action)
		return;
	handle_IRQ_event(irq, regs, action);
}
static void rtl_enable_none(unsigned int irq) { }
static void rtl_disable_none(unsigned int irq) { }

/* startup is the same as "enable", shutdown is same as "disable" */
#define rtl_startup_none	rtl_enable_none
#define rtl_shutdown_none	rtl_disable_none

struct hw_interrupt_type rtl_soft_irq_type = {
	"rtl-soft",
	rtl_startup_none,
	rtl_shutdown_none,
	rtl_do_none,
	rtl_enable_none,
	rtl_disable_none,0
};

/*
 * This is the 'legacy' 8259A Programmable Interrupt Controller,
 * present in the majority of PC/AT boxes.
 */

static void do_8259A_IRQ(unsigned int irq, struct pt_regs * regs);
static void enable_8259A_irq(unsigned int irq);
void disable_8259A_irq(unsigned int irq);

/* startup is the same as "enable", shutdown is same as "disable" */
#define startup_8259A_irq	enable_8259A_irq
#define shutdown_8259A_irq	disable_8259A_irq
static inline void mask_and_ack_8259A(unsigned int irq);
static struct hw_interrupt_type i8259A_irq_type = {
	"XT-PIC",
	startup_8259A_irq,
	shutdown_8259A_irq,
	do_8259A_IRQ,
	enable_8259A_irq,
	disable_8259A_irq,
	mask_and_ack_8259A
};

/*
 * Controller mappings for all interrupt sources:
 */
irq_desc_t irq_desc[NR_IRQS] __cacheline_aligned = { [0 ... NR_IRQS-1] = { 0, &no_irq_type, }};


/*
 * 8259A PIC functions to handle ISA devices:
 */

/*
 * This contains the irq mask for both 8259A irq controllers,
 */
static unsigned int cached_irq_mask = 0xffff;

#define __byte(x,y) 	(((unsigned char *)&(y))[x])
#define cached_21	(__byte(0,cached_irq_mask))
#define cached_A1	(__byte(1,cached_irq_mask))

/*
 * Not all IRQs can be routed through the IO-APIC, eg. on certain (older)
 * boards the timer interrupt is not connected to any IO-APIC pin, it's
 * fed to the CPU IRQ line directly.
 *
 * Any '1' bit in this mask means the IRQ is routed through the IO-APIC.
 * this 'mixed mode' IRQ handling costs nothing because it's only used
 * at IRQ setup time.
 */
unsigned long io_apic_irqs = 0;

/*
 * These have to be protected by the irq controller spinlock
 * before being called.
 */
void disable_8259A_irq(unsigned int irq)
{
	unsigned int mask = 1 << irq;
	cached_irq_mask |= mask;
	if (irq & 8) {
		outb(cached_A1,0xA1);
	} else {
		outb(cached_21,0x21);
	}
}

static void enable_8259A_irq(unsigned int irq)
{
	unsigned int mask = ~(1 << irq);
	cached_irq_mask &= mask;
	if (irq & 8) {
		outb(cached_A1,0xA1);
	} else {
		outb(cached_21,0x21);
	}
}

int i8259A_irq_pending(unsigned int irq)
{
	unsigned int mask = 1<<irq;

	if (irq < 8)
                return (inb(0x20) & mask);
        return (inb(0xA0) & (mask >> 8));
}

void make_8259A_irq(unsigned int irq)
{
	disable_irq_nosync(irq);
	io_apic_irqs &= ~(1<<irq);
	irq_desc[irq].handler = &i8259A_irq_type;
	enable_irq(irq);
}

/*
 * Careful! The 8259A is a fragile beast, it pretty
 * much _has_ to be done exactly like this (mask it
 * first, _then_ send the EOI, and the order of EOI
 * to the two 8259s is important!
 */
/* RTL can't inline this yet, since we put the pointer in the desc */
static void mask_and_ack_8259A(unsigned int irq)
{
	cached_irq_mask |= 1 << irq;
	if (irq & 8) {
		inb(0xA1);	/* DUMMY */
		outb(cached_A1,0xA1);
		outb(0x62,0x20);	/* Specific EOI to cascade */
		outb(0x20,0xA0);
	} else {
		inb(0x21);	/* DUMMY */
		outb(cached_21,0x21);
		outb(0x20,0x20);
	}
}

static void do_8259A_IRQ(unsigned int irq, struct pt_regs * regs)
{
	struct irqaction * action;
	irq_desc_t *desc = irq_desc + irq;

	spin_lock(&irq_controller_lock);
	{
		unsigned int status;
		status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING);
		action = NULL;
		if (!(status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
			action = desc->action;
			status |= IRQ_INPROGRESS;
		}
		desc->status = status;
	}
	spin_unlock(&irq_controller_lock);

	/* Exit early if we had no action or it was disabled */
	if (!action)
		return;
	handle_IRQ_event(irq, regs, action);
	__cli(); /* RTL just to make sure */

	spin_lock(&irq_controller_lock);
	{
		unsigned int status = desc->status & ~IRQ_INPROGRESS;
		desc->status = status;
		if (!(status & IRQ_DISABLED)){
			rtl_emulate_enable_irq(irq);/* RTL: can't touch hdwr*/
		}
	}
	spin_unlock(&irq_controller_lock);
}

/*
 * This builds up the IRQ handler stubs using some ugly macros in irq.h
 *
 * These macros create the low-level assembly IRQ routines that save
 * register context and call do_IRQ(). do_IRQ() then does all the
 * operations that are needed to keep the AT (or SMP IOAPIC)
 * interrupt-controller happy.
 */


BUILD_COMMON_IRQ()

#define BI(x,y) \
	BUILD_IRQ(##x##y)

#define BUILD_16_IRQS(x) \
	BI(x,0) BI(x,1) BI(x,2) BI(x,3) \
	BI(x,4) BI(x,5) BI(x,6) BI(x,7) \
	BI(x,8) BI(x,9) BI(x,a) BI(x,b) \
	BI(x,c) BI(x,d) BI(x,e) BI(x,f)

/*
 * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
 * (these are usually mapped to vectors 0x20-0x30)
 */
BUILD_16_IRQS(0x0)

#ifdef CONFIG_X86_IO_APIC
/*
 * The IO-APIC gives us many more interrupt sources. Most of these 
 * are unused but an SMP system is supposed to have enough memory ...
 * sometimes (mostly wrt. hw bugs) we get corrupted vectors all
 * across the spectrum, so we really want to be prepared to get all
 * of these. Plus, more powerful systems might have more than 64
 * IO-APIC registers.
 *
 * (these are usually mapped into the 0x30-0xff vector range)
 */
                   BUILD_16_IRQS(0x1) BUILD_16_IRQS(0x2) BUILD_16_IRQS(0x3)
BUILD_16_IRQS(0x4) BUILD_16_IRQS(0x5) BUILD_16_IRQS(0x6) BUILD_16_IRQS(0x7)
BUILD_16_IRQS(0x8) BUILD_16_IRQS(0x9) BUILD_16_IRQS(0xa) BUILD_16_IRQS(0xb)
BUILD_16_IRQS(0xc) BUILD_16_IRQS(0xd)
#endif

#undef BUILD_16_IRQS
#undef BI


#ifdef __SMP__
/*
 * The following vectors are part of the Linux architecture, there
 * is no hardware IRQ pin equivalent for them, they are triggered
 * through the ICC by us (IPIs)
 */
BUILD_COMMON_SMP_IRQ() /* RTL needs to have a common path */
BUILD_SMP_INTERRUPT(RESCHEDULE_VECTOR,reschedule_interrupt)
BUILD_SMP_INTERRUPT(INVALIDATE_TLB_VECTOR,invalidate_interrupt)
BUILD_SMP_INTERRUPT(STOP_CPU_VECTOR,stop_cpu_interrupt)
BUILD_SMP_INTERRUPT(SPURIOUS_APIC_VECTOR,spurious_interrupt)
BUILD_SMP_INTERRUPT(CALL_FUNCTION_VECTOR,call_function_interrupt)
  

/*
 * every pentium local APIC has two 'local interrupts', with a
 * soft-definable vector attached to both interrupts, one of
 * which is a timer interrupt, the other one is error counter
 * overflow. Linux uses the local APIC timer interrupt to get
 * a much simpler SMP time architecture:
 */
BUILD_SMP_TIMER_INTERRUPT(LOCAL_TIMER_VECTOR,apic_timer_interrupt)
BUILD_SMP_TIMER_INTERRUPT(RTL_RESCHEDULE_VECTOR,rtl_resched_interrupt)

#endif

#define IRQ(x,y) \
	IRQ##x##y##_interrupt

#define IRQLIST_16(x) \
	IRQ(x,0), IRQ(x,1), IRQ(x,2), IRQ(x,3), \
	IRQ(x,4), IRQ(x,5), IRQ(x,6), IRQ(x,7), \
	IRQ(x,8), IRQ(x,9), IRQ(x,a), IRQ(x,b), \
	IRQ(x,c), IRQ(x,d), IRQ(x,e), IRQ(x,f)

static void (*interrupt[NR_IRQS])(void) = {
	IRQLIST_16(0x0),

#ifdef CONFIG_X86_IO_APIC
	                 IRQLIST_16(0x1)/*, IRQLIST_16(0x2), IRQLIST_16(0x3),
	IRQLIST_16(0x4) , IRQLIST_16(0x5), IRQLIST_16(0x6), IRQLIST_16(0x7),
	IRQLIST_16(0x8), IRQLIST_16(0x9), IRQLIST_16(0xa), IRQLIST_16(0xb),
	IRQLIST_16(0xc), IRQLIST_16(0xd) */
#endif
};

#undef IRQ
#undef IRQLIST_16


/*
 * Special irq handlers.
 */

void no_action(int cpl, void *dev_id, struct pt_regs *regs) { }

#ifndef CONFIG_VISWS
/*
 * Note that on a 486, we don't want to do a SIGFPE on an irq13
 * as the irq is unreliable, and exception 16 works correctly
 * (ie as explained in the intel literature). On a 386, you
 * can't use exception 16 due to bad IBM design, so we have to
 * rely on the less exact irq13.
 *
 * Careful.. Not only is IRQ13 unreliable, but it is also
 * leads to races. IBM designers who came up with it should
 * be shot.
 */
 
static void math_error_irq(int cpl, void *dev_id, struct pt_regs *regs)
{
	outb(0,0xF0);
	if (ignore_irq13 || !boot_cpu_data.hard_math)
		return;
	math_error();
}

static struct irqaction irq13 = { math_error_irq, 0, 0, "fpu", NULL, NULL };

/*
 * IRQ2 is cascade interrupt to second interrupt controller
 */

static struct irqaction irq2  = { no_action, 0, 0, "cascade", NULL, NULL};
#endif

/*
 * Generic, controller-independent functions:
 */

int get_irq_list(char *buf)
{
	int i, j;
	struct irqaction * action;
	char *p = buf;

	p += sprintf(p, "           ");
	for (j=0; j<smp_num_cpus; j++)
		p += sprintf(p, "CPU%d       ",j);
	*p++ = '\n';

	for (i = 0 ; i < NR_IRQS ; i++) {
		action = irq_desc[i].action;
		if (!action) 
			continue;
		p += sprintf(p, "%3d: ",i);
#ifndef __SMP__
		p += sprintf(p, "%10u ", kstat_irqs(i));
#else
		for (j=0; j<smp_num_cpus; j++)
			p += sprintf(p, "%10u ",
				kstat.irqs[cpu_logical_map(j)][i]);
#endif
		p += sprintf(p, " %14s", irq_desc[i].handler->typename);
		p += sprintf(p, "  %s", action->name);

		for (action=action->next; action; action = action->next) {
			p += sprintf(p, ", %s", action->name);
		}
		*p++ = '\n';
	}
	p += sprintf(p, "NMI: %10u\n", atomic_read(&nmi_counter));
#ifdef __SMP__
	p += sprintf(p, "ERR: %10lu\n", ipi_count);
#endif		
	return p - buf;
}

/*
 * Global interrupt locks for SMP. Allow interrupts to come in on any
 * CPU, yet make cli/sti act globally to protect critical regions..
 */
#ifdef __SMP__
unsigned char global_irq_holder = NO_PROC_ID;
unsigned volatile int global_irq_lock;
atomic_t global_irq_count;

atomic_t global_bh_count;
atomic_t global_bh_lock;
spinlock_t i386_bh_lock = SPIN_LOCK_UNLOCKED;

/*
 * "global_cli()" is a special case, in that it can hold the
 * interrupts disabled for a longish time, and also because
 * we may be doing TLB invalidates when holding the global
 * IRQ lock for historical reasons. Thus we may need to check
 * SMP invalidate events specially by hand here (but not in
 * any normal spinlocks)
 */
static inline void check_smp_invalidate(int cpu)
{
	if (test_bit(cpu, &smp_invalidate_needed)) {
		clear_bit(cpu, &smp_invalidate_needed);
		local_flush_tlb();
	}
}

static void show(char * str)
{
	int i;
	unsigned long *stack;
	int cpu = smp_processor_id();
	extern char *get_options(char *str, int *ints);

	printk("\n%s, CPU %d:\n", str, cpu);
	printk("irq:  %d [%d %d]\n",
		atomic_read(&global_irq_count), local_irq_count[0], local_irq_count[1]);
	printk("bh:   %d [%d %d]\n",
		atomic_read(&global_bh_count), local_bh_count[0], local_bh_count[1]);
	stack = (unsigned long *) &stack;
	for (i = 40; i ; i--) {
		unsigned long x = *++stack;
		if (x > (unsigned long) &get_options && x < (unsigned long) &vsprintf) {
			printk("<[%08lx]> ", x);
		}
	}
}
	
#define MAXCOUNT 100000000

static inline void wait_on_bh(void)
{
	int count = MAXCOUNT;
	do {
		if (!--count) {
			show("wait_on_bh");
			count = ~0;
		}
		/* nothing .. wait for the other bh's to go away */
	} while (atomic_read(&global_bh_count) != 0);
}

/*
 * I had a lockup scenario where a tight loop doing
 * spin_unlock()/spin_lock() on CPU#1 was racing with
 * spin_lock() on CPU#0. CPU#0 should have noticed spin_unlock(), but
 * apparently the spin_unlock() information did not make it
 * through to CPU#0 ... nasty, is this by design, do we have to limit
 * 'memory update oscillation frequency' artificially like here?
 *
 * Such 'high frequency update' races can be avoided by careful design, but
 * some of our major constructs like spinlocks use similar techniques,
 * it would be nice to clarify this issue. Set this define to 0 if you
 * want to check whether your system freezes.  I suspect the delay done
 * by SYNC_OTHER_CORES() is in correlation with 'snooping latency', but
 * i thought that such things are guaranteed by design, since we use
 * the 'LOCK' prefix.
 */
#define SUSPECTED_CPU_OR_CHIPSET_BUG_WORKAROUND 1

#if SUSPECTED_CPU_OR_CHIPSET_BUG_WORKAROUND
# define SYNC_OTHER_CORES(x) udelay(x+1)
#else
/*
 * We have to allow irqs to arrive between __sti and __cli
 */
# define SYNC_OTHER_CORES(x) __asm__ __volatile__ ("nop")
#endif

static inline void wait_on_irq(int cpu)
{
	int count = MAXCOUNT;

	for (;;) {

		/*
		 * Wait until all interrupts are gone. Wait
		 * for bottom half handlers unless we're
		 * already executing in one..
		 */
		if (!atomic_read(&global_irq_count)) {
			if (local_bh_count[cpu] || !atomic_read(&global_bh_count))
				break;
		}

		/* Duh, we have to loop. Release the lock to avoid deadlocks */
		clear_bit(0,&global_irq_lock);

		for (;;) {
			if (!--count) {
				show("wait_on_irq");
				count = ~0;
			}
			__sti();
			SYNC_OTHER_CORES(cpu);
			__cli();
			check_smp_invalidate(cpu);
			if (atomic_read(&global_irq_count))
				continue;
			if (global_irq_lock)
				continue;
			if (!local_bh_count[cpu] && atomic_read(&global_bh_count))
				continue;
			if (!test_and_set_bit(0,&global_irq_lock))
				break;
		}
	}
}

/*
 * This is called when we want to synchronize with
 * bottom half handlers. We need to wait until
 * no other CPU is executing any bottom half handler.
 *
 * Don't wait if we're already running in an interrupt
 * context or are inside a bh handler. 
 */
void synchronize_bh(void)
{
	if (atomic_read(&global_bh_count) && !in_interrupt())
		wait_on_bh();
}

/*
 * This is called when we want to synchronize with
 * interrupts. We may for example tell a device to
 * stop sending interrupts: but to make sure there
 * are no interrupts that are executing on another
 * CPU we need to call this function.
 */
void synchronize_irq(void)
{
	if (atomic_read(&global_irq_count)) {
		/* Stupid approach */
		cli();
		sti();
	}
}

static inline void get_irqlock(int cpu)
{
	if (test_and_set_bit(0,&global_irq_lock)) {
		/* do we already hold the lock? */
		if ((unsigned char) cpu == global_irq_holder)
			return;
		/* Uhhuh.. Somebody else got it. Wait.. */
		do {
			do {
				check_smp_invalidate(cpu);
			} while (test_bit(0,&global_irq_lock));
		} while (test_and_set_bit(0,&global_irq_lock));		
	}
	/* 
	 * We also to make sure that nobody else is running
	 * in an interrupt context. 
	 */
	wait_on_irq(cpu);

	/*
	 * Ok, finally..
	 */
	global_irq_holder = cpu;
}

#define EFLAGS_IF_SHIFT 9

/*
 * A global "cli()" while in an interrupt context
 * turns into just a local cli(). Interrupts
 * should use spinlocks for the (very unlikely)
 * case that they ever want to protect against
 * each other.
 *
 * If we already have local interrupts disabled,
 * this will not turn a local disable into a
 * global one (problems with spinlocks: this makes
 * save_flags+cli+sti usable inside a spinlock).
 */
void __global_cli(void)
{
	unsigned int flags;

	__save_flags(flags);
	if (flags & (1 << EFLAGS_IF_SHIFT)) {
		int cpu = smp_processor_id();
		__cli();
		if (!local_irq_count[cpu])
			get_irqlock(cpu);
	}
}

void __global_sti(void)
{
	int cpu = smp_processor_id();

	if (!local_irq_count[cpu])
		release_irqlock(cpu);
	__sti();
}

/*
 * SMP flags value to restore to:
 * 0 - global cli
 * 1 - global sti
 * 2 - local cli
 * 3 - local sti
 */
unsigned long __global_save_flags(void)
{
	int retval;
	int local_enabled;
	unsigned long flags;

	__save_flags(flags);
	local_enabled = (flags >> EFLAGS_IF_SHIFT) & 1;
	/* default to local */
	retval = 2 + local_enabled;

	/* check for global flags if we're not in an interrupt */
	if (!local_irq_count[smp_processor_id()]) {
		if (local_enabled)
			retval = 1;
		if (global_irq_holder == (unsigned char) smp_processor_id())
			retval = 0;
	}
	return retval;
}

void __global_restore_flags(unsigned long flags)
{
	switch (flags) {
	case 0:
		__global_cli();
		break;
	case 1:
		__global_sti();
		break;
	case 2:
		__cli();
		break;
	case 3:
		__sti();
		break;
	default:
		printk("global_restore_flags: %08lx (%08lx)\n",
			flags, (&flags)[-1]);
	}
}

#endif

/*
 * This should really return information about whether
 * we should do bottom half handling etc. Right now we
 * end up _always_ checking the bottom half, which is a
 * waste of time and is not what some drivers would
 * prefer.
 */
int handle_IRQ_event(unsigned int irq, struct pt_regs * regs, struct irqaction * action)
{
	int status;
	int cpu = smp_processor_id();

	irq_enter(cpu, irq);

	status = 1;	/* Force the "do bottom halves" bit */

	do {
		if (!(action->flags & SA_INTERRUPT))
			__sti();
		else
			__cli();
		status |= action->flags;
		action->handler(irq, action->dev_id, regs);
		action = action->next;
	} while (action);
	if (status & SA_SAMPLE_RANDOM)
		add_interrupt_randomness(irq);
	__cli();

	irq_exit(cpu, irq);

	return status;
}

/*
 * Generic enable/disable code: this just calls
 * down into the PIC-specific version for the actual
 * hardware disable after having gotten the irq
 * controller lock. 
 */
void disable_irq_nosync(unsigned int irq)
{
	unsigned long flags;

	spin_lock_irqsave(&irq_controller_lock, flags);
	if (!irq_desc[irq].depth++) {
		irq_desc[irq].status |= IRQ_DISABLED;
		rtl_emulate_disable_irq(irq); /* RTL: hands off hdwr*/
	}
	spin_unlock_irqrestore(&irq_controller_lock, flags);
}

/*
 * Synchronous version of the above, making sure the IRQ is
 * no longer running on any other IRQ..
 */
void disable_irq(unsigned int irq)
{
	disable_irq_nosync(irq);

	if (!local_irq_count[smp_processor_id()]) {
		do {
			barrier();
		} while (irq_desc[irq].status & IRQ_INPROGRESS);
	}
}

void enable_irq(unsigned int irq)
{
	unsigned long flags;
 	DeclareAndInit(cpu_id);

	spin_lock_irqsave(&irq_controller_lock, flags);
	switch (irq_desc[irq].depth) {
	case 1:
		irq_desc[irq].status &= ~IRQ_DISABLED;
 		rtl_emulate_enable_irq(irq); /*RTL: hands off hrdwr */
		/* fall throught */
	default:
		irq_desc[irq].depth--;
		break;
	case 0:
		printk("enable_irq() unbalanced from %p\n",
		       __builtin_return_address(0));
	}
	spin_unlock_irqrestore(&irq_controller_lock, flags);
	if(is_soft_sti())__sti();
}

/*
 * do_IRQ handles all normal device IRQ's (the special
 * SMP cross-CPU interrupts have their own specific
 * handlers).
 */
/* For RTL call with pointer to regs and with irq number already
   calculated by rtl_intercept or by fake_irq
   */
void do_IRQ(unsigned int irq, struct pt_regs *regs)
{	
	int cpu = smp_processor_id();

	kstat.irqs[cpu][irq]++;
	irq_desc[irq].handler->handle(irq, regs);

	/*
	 * This should be conditional: we should really get
	 * a return code from the irq handler to tell us
	 * whether the handler wants us to do software bottom
	 * half handling or not..
	 */
	if (1) {
		if (bh_active & bh_mask)
			do_bottom_half();
	}
}

int setup_x86_irq(unsigned int irq, struct irqaction * new)
{
	int shared = 0;
	struct irqaction *old, **p;
	unsigned long flags;

	/*
	 * Some drivers like serial.c use request_irq() heavily,
	 * so we have to be careful not to interfere with a
	 * running system.
	 */
	if (new->flags & SA_SAMPLE_RANDOM) {
		/*
		 * This function might sleep, we want to call it first,
		 * outside of the atomic block.
		 * Yes, this might clear the entropy pool if the wrong
		 * driver is attempted to be loaded, without actually
		 * installing a new handler, but is this really a problem,
		 * only the sysadmin is able to do this.
		 */
		rand_initialize_irq(irq);
	}

	/*
	 * The following block of code has to be executed atomically
	 */
	spin_lock_irqsave(&irq_controller_lock,flags);
	p = &irq_desc[irq].action;
	if ((old = *p) != NULL) {
		/* Can't share interrupts unless both agree to */
		if (!(old->flags & new->flags & SA_SHIRQ)) {
			spin_unlock_irqrestore(&irq_controller_lock,flags);
			return -EBUSY;
		}

		/* add new interrupt at end of irq queue */
		do {
			p = &old->next;
			old = *p;
		} while (old);
		shared = 1;
	}

	*p = new;

	if (!shared) {
		irq_desc[irq].depth = 0;
		irq_desc[irq].status &= ~IRQ_DISABLED;
 		rtl_emulate_startup_irq(irq); /* RTL: hands off hardware*/
	}
	spin_unlock_irqrestore(&irq_controller_lock,flags);
	return 0;
}

/* VY: needs some synchronization here. Doesn't request_irq also
   have a problem? */
int rtl_get_soft_irq (void (*handler) (int, void *, struct pt_regs *),
		      const char *devname)
{
	int i;
	for (i = NR_IRQS - 1; i > 15; i--) {
		if (!irq_desc[i].action) {
			irq_desc[i].handler = &rtl_soft_irq_type;
			if (request_irq (i, handler, 0, devname, 0)) {
				return -EBUSY;
			} else {
				global_soft_enable(i);
				return i;
			}
		}
	}
	return -1;
}

int request_irq(unsigned int irq, 
		void (*handler)(int, void *, struct pt_regs *),
		unsigned long irqflags, 
		const char * devname,
		void *dev_id)
{
	int retval;
	struct irqaction * action;

	if (irq >= NR_IRQS)
		return -EINVAL;
	if (!handler)
		return -EINVAL;

	action = (struct irqaction *)
			kmalloc(sizeof(struct irqaction), GFP_KERNEL);
	if (!action)
		return -ENOMEM;

	action->handler = handler;
	action->flags = irqflags;
	action->mask = 0;
	action->name = devname;
	action->next = NULL;
	action->dev_id = dev_id;

	retval = setup_x86_irq(irq, action);

	if (retval)
		kfree(action);
	return retval;
}
		
void free_irq(unsigned int irq, void *dev_id)
{
	struct irqaction * action, **p;
	unsigned long flags;

	if (irq >= NR_IRQS)
		return;

	spin_lock_irqsave(&irq_controller_lock,flags);

#ifdef __SMP__
        /* Make sure no interrupt handler is in progress when we
           manipulate the action list and free the structure */
        while (irq_desc[irq].status & IRQ_INPROGRESS) {
                spin_unlock_irqrestore(&irq_controller_lock,flags);
                udelay(1000);
                spin_lock_irqsave(&irq_controller_lock,flags);
        }
#endif

	for (p = &irq_desc[irq].action; (action = *p) != NULL; p = &action->next) {
		if (action->dev_id != dev_id)
			continue;

		/* Found it - now free it */
		*p = action->next;
		kfree(action);
		if (!irq_desc[irq].action) {
			irq_desc[irq].status |= IRQ_DISABLED;
			rtl_emulate_shutdown_irq(irq);/*RTL hands off hardware*/
		}
		goto out;
	}
	printk("Trying to free free IRQ%d\n",irq);
out:
	spin_unlock_irqrestore(&irq_controller_lock,flags);
}

/*
 * IRQ autodetection code..
 *
 * This depends on the fact that any interrupt that
 * comes in on to an unassigned handler will get stuck
 * with "IRQ_WAITING" cleared and the interrupt
 * disabled.
 */
unsigned long probe_irq_on(void)
{
	unsigned int i;
	unsigned long delay;

	/*
	 * first, enable any unassigned irqs
	 */
	spin_lock_irq(&irq_controller_lock);
	for (i = NR_IRQS-1; i > 0; i--) {
		if (!irq_desc[i].action) {
			irq_desc[i].status |= IRQ_AUTODETECT | IRQ_WAITING;
 			rtl_emulate_startup_irq(i); /* RTL hands off hardware*/
		}
	}
	spin_unlock_irq(&irq_controller_lock);

	/*
	 * Wait for spurious interrupts to trigger
	 */
	for (delay = jiffies + HZ/10; time_after(delay, jiffies); )
		/* about 100ms delay */ synchronize_irq();

	/*
	 * Now filter out any obviously spurious interrupts
	 */
	spin_lock_irq(&irq_controller_lock);
	for (i=0; i<NR_IRQS; i++) {
		unsigned int status = irq_desc[i].status;

		if (!(status & IRQ_AUTODETECT))
			continue;
		
		/* It triggered already - consider it spurious. */
		if (!(status & IRQ_WAITING)) {
			irq_desc[i].status = status & ~IRQ_AUTODETECT;
			rtl_emulate_shutdown_irq(i);
/* 		conpr("SSh"); conprn(i); */
		}
	}
	spin_unlock_irq(&irq_controller_lock);

	return 0x12345678;
}

int probe_irq_off(unsigned long unused)
{
	int i, irq_found, nr_irqs;

	if (unused != 0x12345678)
		printk("Bad IRQ probe from %lx\n", (&unused)[-1]);

	nr_irqs = 0;
	irq_found = 0;
	spin_lock_irq(&irq_controller_lock);
	for (i=0; i<NR_IRQS; i++) {
		unsigned int status = irq_desc[i].status;

		if (!(status & IRQ_AUTODETECT))
			continue;

		if (!(status & IRQ_WAITING)) {
			if (!nr_irqs)
				irq_found = i;
			nr_irqs++;
		}
		irq_desc[i].status = status & ~IRQ_AUTODETECT;
		rtl_emulate_shutdown_irq(i);
	}
	spin_unlock_irq(&irq_controller_lock);

	if (nr_irqs > 1)
		irq_found = -irq_found;
	return irq_found;
}

void init_ISA_irqs (void)
{
	int i;

	for (i = 0; i < NR_IRQS; i++) {
		irq_desc[i].status = IRQ_DISABLED;
		irq_desc[i].action = 0;
		irq_desc[i].depth = 0;

		if (i < 16) {
			/*
			 * 16 old-style INTA-cycle interrupts:
			 */
			irq_desc[i].handler = &i8259A_irq_type;
		} else {
			/*
			 * 'high' PCI IRQs filled in on demand
			 */
			irq_desc[i].handler = &no_irq_type;
		}
	}
}

#ifdef __SMP__
/* RTL needs this */
void  smp_reschedule_interrupt(void);
void  smp_invalidate_interrupt(void);
void  smp_stop_cpu_interrupt(void);
void  smp_apic_timer_interrupt(struct pt_regs *);
void  smp_spurious_interrupt(void);
void  smp_call_function_interrupt(void);
#endif /* SMP */

__initfunc(void init_IRQ(void))
{
	int i;

#ifndef CONFIG_X86_VISWS_APIC
	init_ISA_irqs();
#else
	init_VISWS_APIC_irqs();
#endif
	/*
	 * Cover the whole vector space, no vector can escape
	 * us. (some of these will be overridden and become
	 * 'special' SMP interrupts)
	 */
	for (i = 0; i < NR_IRQS; i++) {
		int vector = FIRST_EXTERNAL_VECTOR + i;
		if (vector != SYSCALL_VECTOR) 
			set_intr_gate(vector, interrupt[i]);
	}

#ifdef __SMP__	

	/*
	  IRQ0 must be given a fixed assignment and initialized
	  before init_IRQ_SMP.
	*/
	set_intr_gate(IRQ0_TRAP_VECTOR, interrupt[0]);

	/*
	 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
	 * IPI, driven by wakeup.
	 */
	set_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);

	/* IPI for invalidation */
	set_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt);

	/* IPI for CPU halt */
	set_intr_gate(STOP_CPU_VECTOR, stop_cpu_interrupt);

	/* self generated IPI for local APIC timer */
	set_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);

	/* IPI for generic function call */
	set_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);

	/* IPI vector for APIC spurious interrupts */
	set_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
#ifdef __RTL__
 	set_intr_gate(RTL_RESCHEDULE_VECTOR, rtl_resched_interrupt);
#endif
#endif	
	request_region(0x20,0x20,"pic1");
	request_region(0xa0,0x20,"pic2");

	/*
	 * Set the clock to 100 Hz, we already have a valid
	 * vector now:
	 */
	outb_p(0x34,0x43);		/* binary, mode 2, LSB/MSB, ch 0 */
	outb_p(LATCH & 0xff , 0x40);	/* LSB */
	outb(LATCH >> 8 , 0x40);	/* MSB */

#ifndef CONFIG_VISWS
	setup_x86_irq(2, &irq2);
	setup_x86_irq(13, &irq13);
#endif
}

#ifdef CONFIG_X86_IO_APIC
__initfunc(void init_IRQ_SMP(void))
{
	int i;
	for (i = 0; i < NR_IRQS ; i++)
		if (IO_APIC_VECTOR(i) > 0)
			set_intr_gate(IO_APIC_VECTOR(i), interrupt[i]);
}
#endif



/* these should only be called from Linux kernel so they need
   to hard cli/sti -- I'm saving out of sloppiness, they should never
   be called with hard cli.
   */
void rtl_emulate_shutdown_irq(unsigned int irq){ rtl_emulate_disable_irq(irq);}

void rtl_emulate_disable_irq(unsigned int irq){
	if(rtl_global.rtl_off){
		irq_desc[irq].handler->disable(irq);
		return;
	}

	/* don't actually disable here. We are optimistic and
	   only mask/disable in intercept */
        atomic_global_soft_disable(irq);
}
void rtl_emulate_startup_irq(unsigned int irq){
	int flags;
	if(rtl_global.rtl_off){
		irq_desc[irq].handler->startup(irq);
		global_soft_enable(irq);
		return;
	}
       	rtl_hard_savef_and_cli(flags);
	rtl_spin_lock(&rtl_global.hard_irq_controller_lock);
	global_soft_enable(irq);
	irq_desc[irq].handler->startup(irq); /* start it whether pending or
						not */
	rtl_spin_unlock(&rtl_global.hard_irq_controller_lock);
	rtl_hard_restore_flags(flags);
}
void rtl_emulate_enable_irq(unsigned int irq){
	int flags;
	if(rtl_global.rtl_off){
		irq_desc[irq].handler->enable(irq);
		global_soft_enable(irq);
		return;
	}
       	rtl_hard_savef_and_cli(flags);
	rtl_spin_lock(&rtl_global.hard_irq_controller_lock);
	global_soft_enable(irq);
	if(!global_is_pending_irq(irq)){
		irq_desc[irq].handler->enable(irq);
	}
	rtl_spin_unlock(&rtl_global.hard_irq_controller_lock);
	rtl_hard_restore_flags(flags);
}

void rtl_test_cli(unsigned int *);
#define IENABLE 0x200 /* need to have the actual bit set since global_cli and
			 global_save_flags etc look at it */
void __cli(void) {
	DeclareAndInit(cpu_id);
	if(rtl_global.rtl_off)rtl_hard_cli();
	soft_cli();
}
void __restore_flags(unsigned int x) { 
	DeclareAndInit(cpu_id);
	if(rtl_global.rtl_off){
       	        if(x& IENABLE) {
                      soft_sti();
		      rtl_hard_sti();
		}
		else  { 
			soft_cli();
			rtl_hard_cli();
		}
		return;
	}
	if(x)__sti();
	else __cli();
}
unsigned int __return_flags(void) {
	DeclareAndInit(cpu_id);
	if(rtl_global.rtl_off) {
		unsigned int y;
		rtl_hard_save_flags(y);
		if(y & 0x200) soft_sti();
		else soft_cli();
	}
	return ((RTL_LOCAL.flags & RTL_L_IENABLE_BIT)? IENABLE:0);
}
/* DIAGNOSTICS */

/* Diagnostics */
void rtl_test_cli(unsigned int *x)
{
	unsigned long g,j;
	HardDeclareAndInit(cpu_id);
	rtl_hard_save_flags(g);
	g = (g&0x200? 1: 0);
        j =  (RTL_LOCAL.flags & RTL_L_IENABLE_BIT ? 1: 0);
	if( g != j)
	{
	printk("RTL g: x %p x-1:%x x-2:%x\n",x,*( (int *)x -1),*((int *)x -2));
	}
	return;
}
	
void do_rtl_debug(void){
	unsigned long g;
	HardDeclareAndInit(cpu_id);
	rtl_hard_save_flags(g);
	rtl_hard_cli();
	conpr("\nflags="); conprn(g);
#ifdef __SMP__
	conpr("\nProcessor="); conprn(cpu_id);
	conpr("\nGlobal hard_irq_controller_lock=");
	conprn(rtl_global.hard_irq_controller_lock.lock);
#endif // __SMP__
conpr("\npending 0;"); conprn(rtl_global.pending[0]);
conpr("\nrtl_off;"); conprn(rtl_global.rtl_off);
conpr("\nsoft_enabled 0 ;"); conprn(rtl_global.soft_enabled[0]);
conpr("\nrtirq 0;"); conprn(rtl_global.rtirq[0]);
conpr("\nlocal flags;"); conprn(RTL_LOCAL.flags);
conpr("\ncached irq flags="); conprn(cached_irq_mask);
conpr("----------------\n");
	//outb_p(0x34,0x43);		/* binary, mode 2, LSB/MSB, ch 0 */
//	outb_p(LATCH & 0xff , 0x40);	/* LSB */
//	outb(LATCH >> 8 , 0x40);	/* MSB */
rtl_hard_restore_flags(g);

}
	
void rtl_panic(const char *x)
{
	conpr("\nPANIC "); conpr(x);
	do_rtl_debug();
	while(1);
}
void rtl_test_timer(unsigned char *s)
{
	unsigned long g;
	if(rtl_global.rtl_off)return;
	rtl_hard_save_flags(g);
	conpr(s);
	g = (g&0x200? 1: 0);
	if(!g)
	{
	conpr("real cli in "); conpr(s); conpr("\n");
	}
	if(!(rtl_global.soft_enabled[0] & 1)){
		conpr("no timer enable:"); conpr(s); conpr("\n");
		conpr("pending=:"); conprn(rtl_global.pending[0]); conpr("\n");
	}

}
void rtl_make_sure_real_sti(const char *s){
	unsigned long g;
	if(rtl_global.rtl_off)return;
	rtl_hard_save_flags(g);
	g = (g&0x200? 1: 0);
	if(!g)
	{
	conpr("real cli in "); conpr(s); conpr("\n");
	}
	return;
}

int rtltc(void)
{
	unsigned long g;
	rtl_hard_save_flags(g);
	return (g&0x200? 1: 0);
}
	

/* INTERCEPTS */
/* this intercepts SMP irqs */
#ifdef __SMP__

static inline void do_local_irq(int , struct pt_regs *);

static unsigned int default_local_timer_handler(struct pt_regs *r)
{
	HardDeclareAndInit(cpu_id);
	rtl_local_pend_vec(LOCAL_TIMER_VECTOR,cpu_id);
	return 0;
}

static unsigned int default_local_resched_handler(struct pt_regs *r)
{
	return 0;
}

struct rtl_local_handlers local_timer_handler[NR_CPUS] = {{default_local_timer_handler}, {default_local_timer_handler}};
struct rtl_local_handlers local_resched_handler[NR_CPUS] = {{default_local_resched_handler}, {default_local_resched_handler}};

unsigned int rtl_smp_intercept(struct pt_regs regs){
	unsigned int vector = regs.orig_eax & 0xff;
	HardDeclareAndInit(cpu_id);
	ack_APIC_irq();

	rtl_trace(RTL_TRACE_SMP_INTERCEPT, vector, regs.eip);
       
	if(rtl_global.rtl_off){
		rtl_spin_unlock(&rtl_global.hard_irq_controller_lock);
		soft_cli();
		do_local_irq(vector,&regs);
		soft_sti();
		return 0;
	}

	switch (vector) {
		case RTL_RESCHEDULE_VECTOR:
			local_resched_handler[cpu_id].handler(&regs);
			rtl_trace(RTL_TRACE_SMP_INTERCEPT_EXIT, vector, regs.eip);
			return 1;
		case LOCAL_TIMER_VECTOR:
			local_timer_handler[cpu_id].handler(&regs);
			break;
		case INVALIDATE_TLB_VECTOR:
		case STOP_CPU_VECTOR:
		case CALL_FUNCTION_VECTOR:
		case RESCHEDULE_VECTOR:
			rtl_local_pend_vec(vector,cpu_id);
			break;
		default:
			conpr("RTL unexpected local vector: ");
			conprn(vector);
			return 1;
	}
		

	if((regs.eflags & 0x200) && is_idle_realtime_system() && is_soft_sti())
	{
		soft_cli();
		rtl_hard_sti(); /* yikes */
		__sti(); /* handle any pending interrupts */
		rtl_trace(RTL_TRACE_SMP_INTERCEPT_EXIT, vector, regs.eip);
		return 0;
	}
	else return 1;
}
static inline void do_local_irq(int vector, struct pt_regs *regs){
	switch(vector){
	/* IPI for rescheduling */
		case RESCHEDULE_VECTOR:
			smp_reschedule_interrupt();
			break;
			/* IPI for invalidation */
		case INVALIDATE_TLB_VECTOR:
			smp_invalidate_interrupt();
			break;
			/* IPI for CPU halt */
		case STOP_CPU_VECTOR:
			smp_stop_cpu_interrupt();
			break;
			/* self generated IPI for local APIC timer */
		case LOCAL_TIMER_VECTOR:
			smp_apic_timer_interrupt(regs);
			break;
			/* IPI for function call  control */
		case CALL_FUNCTION_VECTOR:
			smp_call_function_interrupt();
			break;
			/* IPI vector for APIC spurious interrupts */
		case SPURIOUS_APIC_VECTOR:
			smp_spurious_interrupt();
			break;
		default:
			printk("RTL: bad smp vector %x\n",vector);
			break;
	}
}

#endif

unsigned int rtl_intercept(struct pt_regs regs)
{
	unsigned int irq = regs.orig_eax & 0xff;
	HardDeclareAndInit(cpu_id);
	
	rtl_trace(RTL_TRACE_INTERCEPT, irq, regs.eip);
	/* 
	 * We ack quickly, we don't want the irq controller
	 * thinking we're snobs just because some other CPU has
	 * disabled global interrupts (we have already done the
	 * INT_ACK cycles, it's too late to try to pretend to the
	 * controller that we aren't taking the interrupt).
	 *
	 * 0 return value means that this irq is already being
	 * handled by some other CPU. (or is disabled)
	 */
	rtl_spin_lock(&rtl_global.hard_irq_controller_lock);
	irq_desc[irq].handler->mask_and_ack(irq);
	if(rtl_global.rtl_off){
		rtl_spin_unlock(&rtl_global.hard_irq_controller_lock);
		soft_cli();
		do_IRQ(irq,&regs);
		soft_sti();
		return 0;
	}
	/* if there is a real time handler, call it and see if it is
	   willing to share the interrupt */
	if(there_is_a_rt_handler(irq) && rtl_global_handlers[irq].handler)
	{
		rtl_spin_unlock(&rtl_global.hard_irq_controller_lock);
		rtl_global_handlers[irq].handler(irq,&regs);
		rtl_hard_cli(); /* driver may have hard sti'd */
		rtl_spin_lock(&rtl_global.hard_irq_controller_lock);
		if(!global_is_pending_irq(irq)){/* does linux need it? */
			rtl_spin_unlock(&rtl_global.hard_irq_controller_lock);
			rtl_trace2(RTL_TRACE_INTERCEPT_EXIT, irq);
			return 1;
		}
	} 
	else {
		global_pend_irq(irq); /*note structure is locked */
	}
	if(  is_soft_sti() && is_idle_realtime_system()
			&& global_is_enabled_irq(irq))
	{
		global_unpend_irq(irq); /* because we call do_IRQ */
		soft_cli(); /*soft disable interrupts */
		rtl_spin_unlock(&rtl_global.hard_irq_controller_lock);
		rtl_hard_sti(); /* yikes */
		do_IRQ(irq,&regs);
		__sti(); /* take care of any left over irqs */
			       
		rtl_trace2(RTL_TRACE_INTERCEPT_EXIT, irq);
		return 0;
	}
	rtl_global.pended_since_sti = 1;
	rtl_spin_unlock(&rtl_global.hard_irq_controller_lock);
	rtl_trace2(RTL_TRACE_INTERCEPT_EXIT, irq);
	return 1;
	
}



/* pt_regs 
long ebx= 0, long ecx=0, long edx=0, long esi=0, long edi=0,
long ebp=0, long eax=0, int  xds= __KERNEL_DS, int  xes=0, long orig_eax=0,
long eip= (long)__sti, int  xcs= __KERNEL_CS, long eflags= IENABLE,
long esp=0, int  xss=0
*/
#define FAKE_REGS { 0, 0, 0, 0, 0, 0, 0, __KERNEL_DS, 0, 0, (long)__sti, __KERNEL_CS, IENABLE, 0, 0 }

#define MAX_FAKE_DEPTH 200
struct pt_regs fake_regs[NR_CPUS][MAX_FAKE_DEPTH];
struct pt_regs *fake_top[NR_CPUS];
struct pt_regs *next_fake_top(void){
	int i;
	struct pt_regs *r = 0;
#ifdef __SMP__
	DeclareAndInit(cpu_id);
#else
	unsigned int cpu_id = 0;
#endif
	for(i=0; i < MAX_FAKE_DEPTH;i++){
		if(fake_regs[cpu_id][i].orig_eax)continue;
		else{
		       	r = &fake_regs[cpu_id][i];
			r->orig_eax = -1;
			break;}
	}
	if(!r)printk("RTL is astonished to announce out of fake regs\n");
	return r;

}

void pop_fake(struct pt_regs *r){ r->orig_eax = 0; }



#ifdef __SMP__
static inline int fake_local_irq(unsigned int);
static inline int fake_local_irq(unsigned int cpu_id){
	struct pt_regs *r;
	unsigned int pos;
	rtl_hard_cli();
	if( !(r= next_fake_top())) {
		rtl_hard_sti();
		return 0;
	}
	if(RTL_LOCAL.pending){
		pos = ffz(~RTL_LOCAL.pending);
		clear_bit(pos,&RTL_LOCAL.pending);
		r->orig_eax = -1;
		rtl_hard_sti(); /* yikes */
		do_local_irq(LOCAL_PND_TO_VECTOR(pos),r);
		pop_fake(r);
		return 1;
	}
	rtl_hard_sti(); /* yikes */
	pop_fake(r);
	return 0; /* didn't find anything to emulate */
}
#else
#define fake_local_irq(x)  0
#endif

static inline int fake_global_irq(void);
static inline int fake_global_irq(){
	int i,pos,active;
	struct pt_regs *r;
	rtl_hard_cli();
	if(!(r= next_fake_top())){
		rtl_hard_sti();
		return 0;
	}
	rtl_spin_lock(&rtl_global.hard_irq_controller_lock);
	for(i=0; i < IRQ_ARRAY_SIZE;i++){
		if((active= (rtl_global.pending[i]&rtl_global.soft_enabled[i])))
		{
			pos = ffz(~active);
			clear_bit(pos,&rtl_global.pending[i]);
			rtl_spin_unlock(&rtl_global.hard_irq_controller_lock);
			rtl_hard_sti(); /* yikes */
			r->orig_eax = pos_and_index_to_irq(pos,i);
			do_IRQ(pos_and_index_to_irq(pos,i),r);
			pop_fake(r);
			return 1;
		}
	}
	rtl_spin_unlock(&rtl_global.hard_irq_controller_lock);
	rtl_hard_sti(); /* yikes */
	pop_fake(r);
	return 0; /* didn't find anything to emulate */
}

void __sti(){
        unsigned int faked_an_interrupt = 0;
	DeclareAndInit(cpu_id);

	soft_sti();
	rtl_hard_sti();
	if(rtl_global.rtl_off) return;
	do{
		soft_cli();
		faked_an_interrupt = fake_global_irq()| fake_local_irq(cpu_id);
		soft_sti();
	} while((faked_an_interrupt > 0)
			|| (test_and_clear_bit(0,&rtl_global.pended_since_sti))
			|| test_and_clear_bit(RTL_L_SINCE_STI_POS, &RTL_LOCAL.flags));
		 /* the point of this loop is to make sure that IRQs are not
	     stranded pending. 
	     fake_irq may return 0, indicating no irqs pending (nothing to 
	    fake)  and then a new irq may pend. If so, pended_since_sti will
	    be true. If an irq occurs after the test for pended_since, it
	    will simply roll into a second invocation of __sti since we
	    only do the test with IENABLE and in_sti=0;
	    Might need a MB, but it should be doable more simply.
	     */

}

void rtl_init(void)
{
	DeclareAndInit(cpu_id);
#ifdef CONFIG_RTL
	printk("RTL start");
	soft_cli();
	if(test_and_clear_bit(0,&rtl_global.rtl_off)) {
	  // rtl time stuff is now in a module
	}
	printk("ed\n");
#endif
	rtl_hard_sti();
	return;
}

int rtl_request_global_irq(unsigned int irq, 
		unsigned int (*handler)(unsigned int, struct pt_regs *))
{
	if (!test_and_set_bit(irq,&rtl_global.rtirq)) {
		rtl_global_handlers[irq].handler =handler;
/* 		rtl_hard_enable_irq (irq); */
		return 0;
	}
	return -EBUSY;
}

int rtl_free_global_irq(unsigned int irq )
{
	if (!test_bit(irq,&rtl_global.rtirq)) {
		return -EINVAL;
	} else {
		rtl_global_handlers[irq].handler = 0;
		clear_bit(irq,&rtl_global.rtirq);
		return 0;
	}
}



#ifdef __SMP__
/* spinlock_t rtl_lock; */
int rtl_request_local_irq(int i, unsigned int (*handler)(struct pt_regs *r), unsigned int cpu) {
	if (i == LOCAL_TIMER_VECTOR) {
		local_timer_handler[cpu].handler = handler;
		return 0;
	}
	if (i == RTL_RESCHEDULE_VECTOR) {
		local_resched_handler[cpu].handler = handler;
		return 0;
	}
	printk("rtl_request_local_irq not implemented yet\n");
	return -EINVAL;
}

int rtl_free_local_irq(int i, unsigned int cpu){
	if (i == LOCAL_TIMER_VECTOR) {
		local_timer_handler[cpu].handler = default_local_timer_handler;
		return 0;
	}
	if (i == RTL_RESCHEDULE_VECTOR) {
		local_resched_handler[cpu].handler = default_local_resched_handler;
		return 0;
	}
	printk("rtl_free_local_irq not implemented yet\n");
	return -EINVAL;
}

#endif

