Une vue d'ensemble des variantes de câblages peut être trouvé ici :
http://www.1wire.org/media/A_Guide_to_the_1WRJ45_Standard_Draft.zip
Ceux qui ne veulent pas s'arracher les cheveux avec tous ces variates, vous pouvez utilise
le système suivant universel et durable pour le câblage les pins RJ45.
Par couleur : | |||
Pin | EIA/TIA 568A | EIA/TIA 568B | |
1 | Vert/Blanc | Alimentation principale GND | Orange/Blanc |
2 | Vert | Alimentation principale +5V/50mA pour composants 1-Wire | Orange |
3 | Orange/Blanc | Secondaire pour Bus 1-Wire GND | Vert/Blanc |
4 | Bleu | Primaire pour Bus 1-Wire | Bleu |
5 | Bleu/Blanc | Primaire pour Bus 1-Wire GND | Bleu/Blanc |
6 | Orange | Secondaire pour Bus 1-Wire | Vert |
7 | Brun/Blanc | Alimentation auxiliaire par ex. +12V/200mA pour une autre utilisation | Brun/Blanc |
8 | Brun | Alimentation auxiliaire GND | Brun |
Remarque : au sujet des lignes de bus un peut longues, la résistance ohmique a un effet
négatif sur les tensions d'alimentation. Pour cela, lorsque c'est possible, préférez
une alimentation électrique à côté de l'application.
Famille de Code (hex) | Composant / Chip | Description (Taille de la mémoire en bits, wnaa) |
---|---|---|
01 | (DS1990A), (DS1990R), DS2401, DS2411 | 1-Wire net address (registration number) only |
02 | (DS1991)* | Multikey iButton, 1152-bit secure memory |
04 | (DS1994), DS2404 | 4Kb NV RAM memory and clock, timer, alarms |
05 | DS2405* | Single addressable switch |
06 | (DS1993) | 4Kb NV RAM memory |
08 | (DS1992) | 1Kb NV RAM memory |
09 | (DS1982), DS2502 | 1Kb EPROM memory |
0A | (DS1995) | 16Kb NV RAM memory |
0B | (DS1985), DS2505 | 16Kb EPROM memory |
0C | (DS1996) | 64Kb NV RAM memory |
0F | (DS1986), DS2506 | 64Kb EPROM memory |
10 | (DS1920) | Temperature with alarm trips |
12 | DS2406, DS2407* | 1Kb EPROM memory, 2-channel addressable switch |
14 | (DS1971), DS2430A* | 256-bit EEPROM memory and 64-bit OTP register |
1A | (DS1963L)* | 4Kb NV RAM memory with write cycle counters |
1C | DS28E04-100 | 4096-bit EEPROM memory, 2-channel addressable switch |
1D | DS2423* | 4Kb NV RAM memory with external counters |
1F | DS2409* | 2-channel addressable coupler for sub-netting |
20 | DS2450 | 4-channel A/D converter (ADC) |
21 | (DS1921G), (DS1921H), (DS1921Z) | Thermochron® temperature logger |
23 | (DS1973), DS2433 | 4Kb EEPROM memory |
24 | (DS1904), DS2415 | Real-time clock (RTC) |
27 | DS2417 | RTC with interrupt |
29 | DS2408 | 8-channel addressable switch |
2C | DS2890* | 1-channel digital potentiometer |
2D | (DS1972), DS2431 | 1024-bit, 1-Wire EEPROM |
37 | (DS1977) | Password-protected 32KB (bytes) EEPROM |
3A | (DS2413) | 2-channel addressable switch |
41 | (DS1922L), (DS1922T), (DS1923), DS2422 | High-capacity Thermochron (temperature) and Hygrochron™ (humidity) loggers 42 |
La liste n'est pas exhaustive.
* Ces chips ne sont pas recommandés pour les nouvelles conceptions.
http://www.maxim-ic.com/auto_info.cfm/
http://www.1wire.org/
http://www.simat.org.uk/
http://owfs.org/
http://sourceforge.net/projects/owfs/
http://fuse.sourceforge.net/
http://sourceforge.net/projects/fuse/
http://www.maxim-ic.com/auto_info.cfm
MAXIM envoie également des échantillons (gratuit)
http://www.fuchs-shop.com/
http://www.spezial.com/
http://www.1-wire.de/
http://www.reichelt.de/
La gamme du 1-Wire est plutôt pauvre, autrement...
http://www.homechip.com/catalog/
http://www.aagelectronica.com/aag/index.html
http://www.hobby-boards.com/catalog/main_page.php
http://www.tme.eu/de/
Liens :
http://www.hobby-boards.com/catalog/main_page.php
http://www.rockenberg.net/ow.html
http://owfs.org/index.php?page=software
Each device is uniquely and unalterably numbered during manufacture. There are a wide variety of devices, including memory, sensors (humidity, temperature, voltage, contact, current), switches, timers and data loggers. More complex devices (like thermocouple sensors) can be built with these basic devices. There are also 1-wire devices that have encryption included.
The 1-wire scheme uses a single bus master and multiple slaves on the same wire. The bus master initiates all communication. The slaves can be individually discovered and addressed using their unique ID.
Bus masters come in a variety of configurations including serial, parallel, i2c, network or USB adapters.
Details of the individual slave or master design are hidden behind a consistent interface. The goal is to provide an easy set of tools for a software designer to create monitoring or control applications. There are some performance enhancements in the implementation, including data caching, parallel access to bus masters, and aggregation of device communication. Still the fundemental goal has been ease of use, flexibility and correctness rather than speed.
Essentially, the entire 1-wire bus is mounted to a place in your filesystem. All the 1-wire devices are accessible using standard file operations (read, write, directory listing). The system is safe, no actual files are exposed, these files are virtual. Not all operations are supported. Specifically, file creation, deletion, linking and renaming are not allowed. (You can link from outside to a owfs file, but not the other way around).
At least one device option is required. There is no default. More than one device can be listed, and all will be used. (A logical union unless you explore the /bus.n/ directories.)
Linux and BSD enforce a security policy restricting access to hardware ports. You must have sufficient rights to access the given port or access will silently fail.
Changes details of bus timing (see DS2480B datasheet). Some devices, like the Swart LCD cannot work with flextime.
Usually the default settings (9600 for LINK and DS2480B ) and 115200 for the HA5 are sane and shouldn't be changed.
Turn on (default) or off the checksum feature of the HA5 communication.
Synthesize the 1-wire waveforme using a 6-bit (default) serial word, or 8-bit word. Not all UART devices support 6 bit operation.
There are also bus masters based on the serial chip with a USB to serial conversion built in. These are supported by the serial bus master protocol.
i2c_address
port for i2c masters have the form /dev/i2c-0, /dev/i2c-1, ...
The DS2482-800 masters 8 1-wire buses and so will generate 8 /bus.n entries.
E.g. 192.168.0.1:3000 or localhost:3000
-timeout_ha7=60 specific timeout for HA7Net communications (60 second default).
Bus masters are recognized and added dynamically. Details of the physical bus master are not accessible, bu they include USB, i2c and a number of GPIO designs on embedded boards.
Access is restrict to superuser due to the netlink broadcast protocol employed by w1. Multitasking must be configured (threads) on the compilation.
The mountpoint is required. There is no default.
Can also be changed within the program at /settings/units/temperature_scale
Can also be changed within the program at /settings/units/pressure_scale
Although several display formats are selectable, all must be in family-id-crc8 form, unlike some other programs and the labelling on iButtons, which are crc8-id-family form.
Possible formats are f.i (default, 01.A1B2C3D4E5F6), fi fic f.ic f.i.c and fi.c
All formats are accepted as input, but the output will be in the specified format.
The address elements can be retrieved from a device entry in owfs by the family, id and crc8 properties, and as a whole with address. The reversed id and address can be retrieved as r_id and r_address.
-error_level=9 produces a lot of output
Can be changed dynamically at /settings/timeout/volatile
Can be changed dynamically at /settings/timeout/stable
Can be changed dynamically at /settings/timeout/directory
Can be changed dynamically at /settings/timeout/presence
There are also timeouts for specific program responses:
Can be changed dynamically at /settings/timeout/server
Can be changed dynamically at /settings/timeout/ftp
owread -s [host:]port filepath
owwrite -s [host:]port filepath value
owget -s [host:]port [directory] | filepath
owdir -autoserver [directory]
owread -autoserver filepath
owwrite -autoserver filepath value
owget -autoserver [directory] | filepath
owdir -f -format f[.]i[[.]c] ] [ -dir ] -s [host:]port [directory] [directory2 ...]
owread -C -celsius -K -kelvin -F -fahrenheit -R -rankine [ -hex ] [ -start= offset ] [ -size= bytes ] -s [host:]port filepath [filepath2 ...]
owwrite -C -celsius -K -kelvin -F -fahrenheit -R -rankine [ -hex ] [ -start= offset ] -s [host:]port filepath value [filepath2 value2 ...]
owget -f -format f[.]i[[.]c] -C -celsius -K -kelvin -F -fahrenheit -R -rankine [ -hex ] [ -start= offset ] [ -size= bytes ] [ -dir ] -s [host:]port [directory] | filepath
owdir -V -version
owread -V -version
owwrite -V -version
owget -V -version
owdir -h | -help
owread -h | -help
owwrite -h | -help
owget -h | -help
Each device is uniquely and unalterably numbered during manufacture. There are a wide variety of devices, including memory, sensors (humidity, temperature, voltage, contact, current), switches, timers and data loggers. More complex devices (like thermocouple sensors) can be built with these basic devices. There are also 1-wire devices that have encryption included.
The 1-wire scheme uses a single bus master and multiple slaves on the same wire. The bus master initiates all communication. The slaves can be individually discovered and addressed using their unique ID.
Bus masters come in a variety of configurations including serial, parallel, i2c, network or USB adapters.
Details of the individual slave or master design are hidden behind a consistent interface. The goal is to provide an easy set of tools for a software designer to create monitoring or control applications. There are some performance enhancements in the implementation, including data caching, parallel access to bus masters, and aggregation of device communication. Still the fundemental goal has been ease of use, flexibility and correctness rather than speed.
Unlike owserver (1) owhttpd (1) owftpd (1) owhttpd (1) there is not persistent connection with the 1-wire bus, no caching and no multithreading. Instead, each program connects to a running owserver (1) and performs a quick set of queries.
owserver (1) performs the actual 1-wire connection (to physical 1-wire busses or other owserver programs), performs concurrency locking, caching, and error collection.
owshell programs are intended for use in command line scripts. An alternative approach is to mount an owfs (1) filesystem and perform direct file lists, reads and writes.
in the owfs (1) filesystem.
in the owfs (1) filesystem.
in the owfs (1) filesystem.
Writing data in hexidecimal mode just means that the data should be given as one long hexidecimal string.
Possible formats are f.i (default, 01.A1B2C3D4E5F6), fi fic f.ic f.i.c and fi.c
All formats are accepted as input, but the output will be in the specified format.
Similar to Unix shell script or perl syntax
# blank lines are ignored
option = value # other options need a value
option value # '=' can be omitted if whitespace separates
Option # Case is ignored (for options, not values)
opt # non-ambiguous abbreviation allowed
-opt -opt # hyphens ignored
! server: opt = value # owserver NOT effected by this line
! http: opt = value # owhttpd NOT effected by this line
! ftp: opt = value # owftpd NOT effected by this line
! owfs: opt = value # owfs NOT effected by this line
# no limit on number of lines
Each device is uniquely and unalterably numbered during manufacture. There are a wide variety of devices, including memory, sensors (humidity, temperature, voltage, contact, current), switches, timers and data loggers. More complex devices (like thermocouple sensors) can be built with these basic devices. There are also 1-wire devices that have encryption included.
The 1-wire scheme uses a single bus master and multiple slaves on the same wire. The bus master initiates all communication. The slaves can be individually discovered and addressed using their unique ID.
Bus masters come in a variety of configurations including serial, parallel, i2c, network or USB adapters.
Details of the individual slave or master design are hidden behind a consistent interface. The goal is to provide an easy set of tools for a software designer to create monitoring or control applications. There are some performance enhancements in the implementation, including data caching, parallel access to bus masters, and aggregation of device communication. Still the fundemental goal has been ease of use, flexibility and correctness rather than speed.
Not all OWFS programs use the same command line options, but the non-relevant ones will be ignored.
Command line and configuration options can mixed. They will be invoked in the order presented. Left to right for the command line. Top to bottom for the configuration file.
Configuration files can call other configuration files. There is an arbitrary depth of 5 levels to prevent infinite loops. More than one configuration file can be specified.
device = /dev/ttyS0 # serial port: DS9097U DS9097 ECLO or LINK
device = /dev/i2c-0 # i2c port: DS2482-100 or DS2482-800
usb # USB device: DS9490 PuceBaboon
usb = 2 # Second DS9490
usb = all # All DS9490s
altUSB # Willy Robison's tweaks
LINK = /dev/ttyS0 # serial LINK in ascii mode
LINK = [address:]port # LINK-HUB-E (tcp access)
HA7 # HA7Net autodiscovery mode
HA7 = address[:port] # HA7Net at tcp address (port 80)
etherweather = address[:port] # Etherweather device
server = [address:]port # owserver tcp address
FAKE = 10,1B # Random simulated device with family codes (hex)
TESTER = 28,3E # Predictable simulated device with family codes
#
# Sinks
# # owfs specific
mountpoint = filelocation # FUSE mount point
allow_other # Short hand for FUSE mount option "
# # owhttpd owserver owftpd specific
port = [address:]port # tcp out port
#
# Temperature scales
Celsius # default
Fahrenheit
Kelvin
Rankine
#
# Timeouts (all in seconds)
# cache for values that change on their own
timeout_volatile = value # seconds "volatile" values remain in cache
# cache for values that change on command
timeout_stable = value # seconds "stable" values remain in cache
# cache for directory lists (non-alarm)
timeout_directory = value # seconds "directory" values remain in cache
# cache for 1-wire device location
timeout_presence = value # seconds "device presence" (which bus)
timeout_serial = value # seconds to wait for serial response
timeout_usb = value # seconds to wait for USB response
timeout_network = value # seconds to wait for tcp/ip response
timeout_ftp = value # seconds inactivity before closing ftp session
#
# Process control
configuration = filename # file (like this) of program options
pid_file = filename # file to store PID number
foreground
background # default
readonly # prevent changing 1-wire device contents
write # default
error_print = 0-3 # 0-mixed 1-syslog 2-stderr 3-suppressed
error_level = 0-9 # increasing noise
#
# zeroconf / Bonjour
zero # turn on zeroconf announcement (default)
nozero # turn off zeroconf announcement
annouce = name # name of announced service (optional)
autoserver # Add owservers descovered by zeroconf/Bonjour
noautoserver # Don't use zeroconf/Bonjour owservers (default)
#
# tcp persistence
timeout_persistent_low = 600 # minimum time a persistent socket will stay open
timeout_persistent_high = 3600 # max time an idle client socket will stay around
#
# Display
format = f[.]i[[.]c] # 1-wire address f amily i d code c rc
#
# Cache
cache_size = 1000000 # maximum cache size (in bytes) or 0 for no limit (default 0) #
# Information
# (silly in a configuration file)
version
help
morehelp
DS1920 - iButton version of the thermometer
10 [.]XXXXXXXXXXXX[XX][/[ die | power | temperature | temphigh | templow | trim | trimblanket | trimvalid | address | crc8 | id | locator | r_address | r_id | r_locator | type ]]
10
Is the chip powered externally (=1) or from the parasitically from the data bus (=0)?
Temperature read by the chip at high resolution ( 12 bits). Units are selected from the invoking command line. See owfs(1) or owhttpd(1) for choices. Default is Celsius. Conversion takes 1000 msec.
Units for the temperature alarms are in the same temperature scale that was set for temperature measurements.
Temperature thresholds are stored in non-volatile memory and persist until changed, even if power is lost.
Shows or sets the lower limit for the high temperature alarm state.
Shows or sets the upper limit for the low temperature alarm state.
Two character manufacturing die lot. "B6" "B7" or "C2"
32 bit trim value in the EEPROM of the chip. When written, it does not seem to read back. Used for a production problem in the B7 die.
Read allowed for all chips. Only the B7 chips can be written.
Writing non-zero (=1) puts a default trim value in the chip. Only applied to the B7 die. Reading will be true (non-zero) if trim value is the blanket value. Again, only B7 chips will register true, and since the written trim values cannot be read, this value may have little utility.
Is the trim value in the valid range? Non-zero if true, which includes all non-B7 chips.
The entire 64-bit unique ID. Given as upper case hexidecimal digits (0-9A-F).
address starts with the family code
r address is the address in reverse order, which is often used in other applications and labeling.
The 8-bit error correction portion. Uses cyclic redundancy check. Computed from the preceding 56 bits of the unique ID number. Given as upper case hexidecimal digits (0-9A-F).
The 8-bit family code. Unique to each type of device. Given as upper case hexidecimal digits (0-9A-F).
The 48-bit middle portion of the unique ID number. Does not include the family code or CRC. Given as upper case hexidecimal digits (0-9A-F).
r id is the id in reverse order, which is often used in other applications and labeling.
Uses an extension of the 1-wire design from iButtonLink company that associated 1-wire physical connections with a unique 1-wire code. If the connection is behind a Link Locator the locator will show a unique 8-byte number (16 character hexidecimal) starting with family code FE.
If no Link Locator is between the device and the master, the locator field will be all FF.
r locator is the locator in reverse order.
Is the device currently present on the 1-wire bus?
Part name assigned by Dallas Semi. E.g. DS2401 Alternative packaging (iButton vs chip) will not be distiguished.
Each device is uniquely and unalterably numbered during manufacture. There are a wide variety of devices, including memory, sensors (humidity, temperature, voltage, contact, current), switches, timers and data loggers. More complex devices (like thermocouple sensors) can be built with these basic devices. There are also 1-wire devices that have encryption included.
The 1-wire scheme uses a single bus master and multiple slaves on the same wire. The bus master initiates all communication. The slaves can be individually discovered and addressed using their unique ID.
Bus masters come in a variety of configurations including serial, parallel, i2c, network or USB adapters.
Details of the individual slave or master design are hidden behind a consistent interface. The goal is to provide an easy set of tools for a software designer to create monitoring or control applications. There are some performance enhancements in the implementation, including data caching, parallel access to bus masters, and aggregation of device communication. Still the fundemental goal has been ease of use, flexibility and correctness rather than speed.
where 01 is an example 8-bit family code, and 12345678ABC is an example 48 bit address.
The dot is optional, and the CRC code can included. If included, it must be correct.
http://pdfserv.maxim-ic.com/en/ds/DS18S20.pdf
DS1990A - Serial Number iButton
01 [.]XXXXXXXXXXXX[XX][/[ address | crc8 | id | locator | r_address | r_id | r_locator | type ]]
01
The entire 64-bit unique ID. Given as upper case hexidecimal digits (0-9A-F).
address starts with the family code
r address is the address in reverse order, which is often used in other applications and labeling.
The 8-bit error correction portion. Uses cyclic redundancy check. Computed from the preceding 56 bits of the unique ID number. Given as upper case hexidecimal digits (0-9A-F).
The 8-bit family code. Unique to each type of device. Given as upper case hexidecimal digits (0-9A-F).
The 48-bit middle portion of the unique ID number. Does not include the family code or CRC. Given as upper case hexidecimal digits (0-9A-F).
r id is the id in reverse order, which is often used in other applications and labeling.
Uses an extension of the 1-wire design from iButtonLink company that associated 1-wire physical connections with a unique 1-wire code. If the connection is behind a Link Locator the locator will show a unique 8-byte number (16 character hexidecimal) starting with family code FE.
If no Link Locator is between the device and the master, the locator field will be all FF.
r locator is the locator in reverse order.
Is the device currently present on the 1-wire bus?
Part name assigned by Dallas Semi. E.g. DS2401 Alternative packaging (iButton vs chip) will not be distiguished.
Each device is uniquely and unalterably numbered during manufacture. There are a wide variety of devices, including memory, sensors (humidity, temperature, voltage, contact, current), switches, timers and data loggers. More complex devices (like thermocouple sensors) can be built with these basic devices. There are also 1-wire devices that have encryption included.
The 1-wire scheme uses a single bus master and multiple slaves on the same wire. The bus master initiates all communication. The slaves can be individually discovered and addressed using their unique ID.
Bus masters come in a variety of configurations including serial, parallel, i2c, network or USB adapters.
Details of the individual slave or master design are hidden behind a consistent interface. The goal is to provide an easy set of tools for a software designer to create monitoring or control applications. There are some performance enhancements in the implementation, including data caching, parallel access to bus masters, and aggregation of device communication. Still the fundemental goal has been ease of use, flexibility and correctness rather than speed.
where 01 is an example 8-bit family code, and 12345678ABC is an example 48 bit address.
The dot is optional, and the CRC code can included. If included, it must be correct.
http://pdfserv.maxim-ic.com/en/ds/DS2401.pdf
http://pdfserv.maxim-ic.com/en/ds/DS1990A-F3-DS1990A-F5.pdf
12 [.]XXXXXXXXXXXX[XX][/[ channels | latch.[A|B|ALL|BYTE] | memory | pages/page.[0-3|ALL] | PIO.[A|B|ALL|BYTE] | power | sensed.[A|B|ALL|BYTE] | set_alarm | TAI8570/[sibling|temperature|pressure] | T8A/volt.[0-7,ALL] address | crc8 | id | locator | r_address | r_id | r_locator | type ]]
12
Is this a 1 or 2 channel switch? The DS2406 comes in two forms, one has only one PIO pin (PIO.A). Returns 1 or 2.
The activity latch is set to 1 with the first negative or positive edge detected on the associated PIO channel.
Writing any data will clear latch for all (both)) channels. This is a hardware "feature" of the chip.
ALL references both channels simultaneously, comma separated
BYTE references both channels simultaneously as a single byte, with channel A in bit 0.
128 bytes of non-volatile, write-once data.
Memory organized as 4 pages or 32 bytes. Memory is write-once.
ALL is the aggregate of all 4 pages, sequentially accessed.
State of the open-drain output ( PIO ) pin. 0 = non-conducting (off), 1 = conducting (on).
Writing zero will turn off the switch, non-zero will turn on the switch. Reading the PIO state will return the switch setting (flipflop in the data sheet). To determine the actual logic level at the switch, refer to the sensed property.
Note that the actual pin setting for the chip uses the opposite polarity - 0 for conducting, 1 for non-conducting. However, to turn a connected device on (i.e. to deliver power) we use the software concept of 1 as conducting or "on".
ALL references both channels simultaneously, comma separated.
BYTE references both channels simultaneously as a single byte, with channel A in bit 0.
Is the DS2406 powered parasitically =0 or separately on the Vcc pin =1
Logic level at the PIO pin. 0 = ground. 1 = high ( 2.4V - 5V ). Really makes sense only if the PIO state is set to zero (off), else will read zero.
ALL references both channels simultaneously, comma separated.
BYTE references both channels simultaneously as a single byte, with channel A in bit 0.
A number consisting of three digits XYZ, where:
0 neither
1 A only
2 B only
3 A or B
0 undefined
1 latch
2 PIO
3 sensed
0 low
1 high
All digits will be truncated to the 0-3 (or 0-1) range. Leading zeroes are optional (and may be problematic for some shells).
Example:
Properties when the DS2406 (3) is built into a TAI8570.
If the DS2406 (3) is not part of a TAI8570 or is not the controlling switch, attempts to read will result in an error.
Barometric pressure in millibar.
Hex address of the DS2406 (3) paired with this chip in a TAI8570.
Ambient temperature measured by the TAI8570 in prevailing temperature units (Centigrade is the default).
Uses the T8A (by Embedded Data Systems ) 8 channel voltage converter. Units in volts, 0 to 5V range. 12 bit resolution.
The entire 64-bit unique ID. Given as upper case hexidecimal digits (0-9A-F).
address starts with the family code
r address is the address in reverse order, which is often used in other applications and labeling.
The 8-bit error correction portion. Uses cyclic redundancy check. Computed from the preceding 56 bits of the unique ID number. Given as upper case hexidecimal digits (0-9A-F).
The 8-bit family code. Unique to each type of device. Given as upper case hexidecimal digits (0-9A-F).
The 48-bit middle portion of the unique ID number. Does not include the family code or CRC. Given as upper case hexidecimal digits (0-9A-F).
r id is the id in reverse order, which is often used in other applications and labeling.
Uses an extension of the 1-wire design from iButtonLink company that associated 1-wire physical connections with a unique 1-wire code. If the connection is behind a Link Locator the locator will show a unique 8-byte number (16 character hexidecimal) starting with family code FE.
If no Link Locator is between the device and the master, the locator field will be all FF.
r locator is the locator in reverse order.
Is the device currently present on the 1-wire bus?
Part name assigned by Dallas Semi. E.g. DS2401 Alternative packaging (iButton vs chip) will not be distiguished.
Each device is uniquely and unalterably numbered during manufacture. There are a wide variety of devices, including memory, sensors (humidity, temperature, voltage, contact, current), switches, timers and data loggers. More complex devices (like thermocouple sensors) can be built with these basic devices. There are also 1-wire devices that have encryption included.
The 1-wire scheme uses a single bus master and multiple slaves on the same wire. The bus master initiates all communication. The slaves can be individually discovered and addressed using their unique ID.
Bus masters come in a variety of configurations including serial, parallel, i2c, network or USB adapters.
Details of the individual slave or master design are hidden behind a consistent interface. The goal is to provide an easy set of tools for a software designer to create monitoring or control applications. There are some performance enhancements in the implementation, including data caching, parallel access to bus masters, and aggregation of device communication. Still the fundemental goal has been ease of use, flexibility and correctness rather than speed.
The DS2407 is practically identical to the DS2406 except for a strange hidden mode. It is supported just like the DS2406
The TAI8570 uses the Intersema MS5534a pressure sensor, and stores calibration and temperature compensation values internally.
Design and code examples are available from AAG Electronica http://aag.com.mx/ , specific permission to use code in a GPL product was given by Mr. Aitor Arrieta of AAG and Dr. Simon Melhuish of OWW.
where 01 is an example 8-bit family code, and 12345678ABC is an example 48 bit address.
The dot is optional, and the CRC code can included. If included, it must be correct.
http://pdfserv.maxim-ic.com/en/ds/DS2406.pdf
http://pdfserv.maxim-ic.com/en/ds/DS2407.pdf
http://www.embeddeddatasystems.com/page/EDS/PROD/IO/T8A
http://oww.sourceforge.net/hardware.html#bp
29 [.]XXXXXXXXXXXX[XX][/[ latch.[0-7|ALL|BYTE] | LCD_M/[clear|home|screen|message] | LCD_H/[clear|home|yxscreen|screen|message|onoff] | PIO.[0-7|ALL|BYTE] | power | sensed.[0-7|ALL|BYTE] | strobe | por | set_alarm | address | crc8 | id | locator | r_address | r_id | r_locator | type ]]
29
The 8 pins (PIO) latch a bit when their state changes, either externally, or through a write to the pin.
Reading the latch property indicates that the latch has been set.
Writing "true" (non-zero) to ANY latch will reset them all. (This is the hardware design).
ALL is all latch states, accessed simultaneously, comma separated.
BYTE references all channels simultaneously as a single byte. Channel 0 is bit 0.
State of the open-drain output ( PIO ) pin. 0 = non-conducting (off), 1 = conducting (on).
Writing zero will turn off the switch, non-zero will turn on the switch. Reading the PIO state will return the switch setting. To determine the actual logic level at the switch, refer to the sensed.0 ... sensed.7 sensed.ALL sensed.BYTE property.
ALL references all channels simultaneously, comma separated.
BYTE references all channels simultaneously as a single byte. Channel 0 is bit 0.
Is the DS2408 powered parasitically (0) or separately on the Vcc pin (1)?
Logic level at the PIO pin. 0 = ground. 1 = high ( 2.4V - 5V ). Really makes sense only if the PIO state is set to zero (off), else will read zero.
ALL references all channels simultaneously, comma separated.
BYTE references all channels simultaneously as a single byte. Channel 0 is bit 0.
RSTZ Pin Mode Control. Configures RSTZ as either RST input or STRB output:
Specifies whether the device has performed power-on reset. This bit can only be cleared to 0 under software control. As long as this bit is 1 the device will allways respond to a conditional search.
A number consisting of 9 digits XYYYYYYYY, where:
0 PIO OR
1 latch OR
2 PIO AND
3 latch AND
0 Unselected (LOW)
1 Unselected (HIGH)
2 Selected LOW
3 Selected HIGH
All digits will be truncated to the 0-3 range. Leading zeroes are optional. Low-order digit is channel 0.
Example:
This will clear the screen and place the cursor at the start.
Positions the cursor in the home (upper left) position, but leaves the current text intact.
Writes to the LCD screen at the current position.
Writes to an LCD screen at a specified location. The controller doesn't know the true LCD dimensions, but typical selections are: 2x16 2x20 4x16 and 4x20.
There are two formats allowed for the screenyx text, either ascii (readable text) or a binary form.
The positions are 1-based (i.e. the first position is 1,1).
Sets several screen display functions. The selected choices should be added together.
Writes a message to the LCD screen after clearing the screen first. This is the easiest way to display a message.
This will clear the screen and place the cursor at the start.
Positions the cursor in the home (upper left) position, but leaves the current text intact.
Writes to the LCD screen at the current position.
Writes to an LCD screen at a specified location. The controller doesn't know the true LCD dimensions, but typical selections are: 2x16 2x20 4x16 and 4x20.
There are two formats allowed for the screenyx text, either ascii (readable text) or a binary form.
The positions are 1-based (i.e. the first position is 1,1).
Sets several screen display functions. The selected choices should be added together.
Writes a message to the LCD screen after clearing the screen first. This is the easiest way to display a message.
The entire 64-bit unique ID. Given as upper case hexidecimal digits (0-9A-F).
address starts with the family code
r address is the address in reverse order, which is often used in other applications and labeling.
The 8-bit error correction portion. Uses cyclic redundancy check. Computed from the preceding 56 bits of the unique ID number. Given as upper case hexidecimal digits (0-9A-F).
The 8-bit family code. Unique to each type of device. Given as upper case hexidecimal digits (0-9A-F).
The 48-bit middle portion of the unique ID number. Does not include the family code or CRC. Given as upper case hexidecimal digits (0-9A-F).
r id is the id in reverse order, which is often used in other applications and labeling.
Uses an extension of the 1-wire design from iButtonLink company that associated 1-wire physical connections with a unique 1-wire code. If the connection is behind a Link Locator the locator will show a unique 8-byte number (16 character hexidecimal) starting with family code FE.
If no Link Locator is between the device and the master, the locator field will be all FF.
r locator is the locator in reverse order.
Is the device currently present on the 1-wire bus?
Part name assigned by Dallas Semi. E.g. DS2401 Alternative packaging (iButton vs chip) will not be distiguished.
Each device is uniquely and unalterably numbered during manufacture. There are a wide variety of devices, including memory, sensors (humidity, temperature, voltage, contact, current), switches, timers and data loggers. More complex devices (like thermocouple sensors) can be built with these basic devices. There are also 1-wire devices that have encryption included.
The 1-wire scheme uses a single bus master and multiple slaves on the same wire. The bus master initiates all communication. The slaves can be individually discovered and addressed using their unique ID.
Bus masters come in a variety of configurations including serial, parallel, i2c, network or USB adapters.
Details of the individual slave or master design are hidden behind a consistent interface. The goal is to provide an easy set of tools for a software designer to create monitoring or control applications. There are some performance enhancements in the implementation, including data caching, parallel access to bus masters, and aggregation of device communication. Still the fundemental goal has been ease of use, flexibility and correctness rather than speed.
Alternative switches include the DS2406, DS2407 and even DS2450
All 1-wire devices are factory assigned a unique 64-bit address. This address is of the form:
where 01 is an example 8-bit family code, and 12345678ABC is an example 48 bit address.
The dot is optional, and the CRC code can included. If included, it must be correct.
http://pdfserv.maxim-ic.com/en/ds/DS2408.pdf
http://www.hobby-boards.com/catalog/howto_lcd_driver.php
http://www.maxim-ic.com/appnotes.cfm/appnote_number/3286
3A [.]XXXXXXXXXXXX[XX][/[ PIO.[A|B|ALL|BYTE] | sensed.[A|B|ALL|BYTE] | address | crc8 | id | locator | r_address | r_id | r_locator | type ]]
3A
State of the open-drain output ( PIO ) pin. 0 = non-conducting (off), 1 = conducting (on).
Writing zero will turn off the switch, non-zero will turn on the switch. Reading the PIO state will return the switch setting. To determine the actual logic level at the switch, refer to the sensed property.
ALL references both channels simultaneously, comma separated.
BYTE references both channels simultaneously as a single byte, with channel A in bit 0.
Logic level at the PIO pin. 0 = ground. 1 = high ( 2.4V - 5V ). Really makes sense only if the PIO state is set to zero (off), else will read zero.
ALL references both channels simultaneously, comma separated.
BYTE references both channels simultaneously as a single byte, with channel A in bit 0.
The entire 64-bit unique ID. Given as upper case hexidecimal digits (0-9A-F).
address starts with the family code
r address is the address in reverse order, which is often used in other applications and labeling.
The 8-bit error correction portion. Uses cyclic redundancy check. Computed from the preceding 56 bits of the unique ID number. Given as upper case hexidecimal digits (0-9A-F).
The 8-bit family code. Unique to each type of device. Given as upper case hexidecimal digits (0-9A-F).
The 48-bit middle portion of the unique ID number. Does not include the family code or CRC. Given as upper case hexidecimal digits (0-9A-F).
r id is the id in reverse order, which is often used in other applications and labeling.
Uses an extension of the 1-wire design from iButtonLink company that associated 1-wire physical connections with a unique 1-wire code. If the connection is behind a Link Locator the locator will show a unique 8-byte number (16 character hexidecimal) starting with family code FE.
If no Link Locator is between the device and the master, the locator field will be all FF.
r locator is the locator in reverse order.
Is the device currently present on the 1-wire bus?
Part name assigned by Dallas Semi. E.g. DS2401 Alternative packaging (iButton vs chip) will not be distiguished.
Each device is uniquely and unalterably numbered during manufacture. There are a wide variety of devices, including memory, sensors (humidity, temperature, voltage, contact, current), switches, timers and data loggers. More complex devices (like thermocouple sensors) can be built with these basic devices. There are also 1-wire devices that have encryption included.
The 1-wire scheme uses a single bus master and multiple slaves on the same wire. The bus master initiates all communication. The slaves can be individually discovered and addressed using their unique ID.
Bus masters come in a variety of configurations including serial, parallel, i2c, network or USB adapters.
Details of the individual slave or master design are hidden behind a consistent interface. The goal is to provide an easy set of tools for a software designer to create monitoring or control applications. There are some performance enhancements in the implementation, including data caching, parallel access to bus masters, and aggregation of device communication. Still the fundemental goal has been ease of use, flexibility and correctness rather than speed.
Unique among the switches, the DS2413 can switch higher voltages, up to 28V.
where 01 is an example 8-bit family code, and 12345678ABC is an example 48 bit address.
The dot is optional, and the CRC code can included. If included, it must be correct.
http://datasheets.maxim-ic.com/en/ds/DS2413.pdf
1D [.]XXXXXXXXXXXX[XX][/[ counters.[A|B|ALL] | memory | pages/page.[0-15|ALL] | pages/count.[0-15|ALL] | address | crc8 | id | locator | r_address | r_id | r_locator | type ]]
1D
Debounced external counter. Associated with RAM page.14 and page.15 Note: counter increments only. It is reset when the chip loses power.
ALL returns the two values, separated by a comma. They are read sequentially.
512 bytes of memory.
Memory is split into 16 pages of 32 bytes each. Memory is RAM, contents are lost when power is lost. ALL is an aggregate of the pages. Each page is accessed sequentially.
Write access to each page of memory. Actually only page.12 and page.13 have write counters.
page14 and page.15 's counters are associated with the external counters.A and counters.B triggers.
The value 0xFFFFFFFF is returned for pages/count.0 through pages/count.11
ALL is an aggregate of the counters, comma separated. Each page is accessed sequentially.
The entire 64-bit unique ID. Given as upper case hexidecimal digits (0-9A-F).
address starts with the family code
r address is the address in reverse order, which is often used in other applications and labeling.
The 8-bit error correction portion. Uses cyclic redundancy check. Computed from the preceding 56 bits of the unique ID number. Given as upper case hexidecimal digits (0-9A-F).
The 8-bit family code. Unique to each type of device. Given as upper case hexidecimal digits (0-9A-F).
The 48-bit middle portion of the unique ID number. Does not include the family code or CRC. Given as upper case hexidecimal digits (0-9A-F).
r id is the id in reverse order, which is often used in other applications and labeling.
Uses an extension of the 1-wire design from iButtonLink company that associated 1-wire physical connections with a unique 1-wire code. If the connection is behind a Link Locator the locator will show a unique 8-byte number (16 character hexidecimal) starting with family code FE.
If no Link Locator is between the device and the master, the locator field will be all FF.
r locator is the locator in reverse order.
Is the device currently present on the 1-wire bus?
Part name assigned by Dallas Semi. E.g. DS2401 Alternative packaging (iButton vs chip) will not be distiguished.
Each device is uniquely and unalterably numbered during manufacture. There are a wide variety of devices, including memory, sensors (humidity, temperature, voltage, contact, current), switches, timers and data loggers. More complex devices (like thermocouple sensors) can be built with these basic devices. There are also 1-wire devices that have encryption included.
The 1-wire scheme uses a single bus master and multiple slaves on the same wire. The bus master initiates all communication. The slaves can be individually discovered and addressed using their unique ID.
Bus masters come in a variety of configurations including serial, parallel, i2c, network or USB adapters.
Details of the individual slave or master design are hidden behind a consistent interface. The goal is to provide an easy set of tools for a software designer to create monitoring or control applications. There are some performance enhancements in the implementation, including data caching, parallel access to bus masters, and aggregation of device communication. Still the fundemental goal has been ease of use, flexibility and correctness rather than speed.
The external counters A and B page been used in circuit design, such as a wind anometer. OWFS system handles this automatically.
where 01 is an example 8-bit family code, and 12345678ABC is an example 48 bit address.
The dot is optional, and the CRC code can included. If included, it must be correct.
http://pdfserv.maxim-ic.com/en/ds/DS2423.pdf
23 [.]XXXXXXXXXXXX[XX][/[ memory | pages/page.[0-15|ALL] | address | crc8 | id | locator | r_address | r_id | r_locator | type ]]
23 DS2433
512 bytes of memory. Initially all bits are set to 1. Writing zero permanently alters the memory.
Memory is split into 16 pages of 32 bytes each. ALL is an aggregate of the pages. Each page is accessed sequentially.
The entire 64-bit unique ID. Given as upper case hexidecimal digits (0-9A-F).
address starts with the family code
r address is the address in reverse order, which is often used in other applications and labeling.
The 8-bit error correction portion. Uses cyclic redundancy check. Computed from the preceding 56 bits of the unique ID number. Given as upper case hexidecimal digits (0-9A-F).
The 8-bit family code. Unique to each type of device. Given as upper case hexidecimal digits (0-9A-F).
The 48-bit middle portion of the unique ID number. Does not include the family code or CRC. Given as upper case hexidecimal digits (0-9A-F).
r id is the id in reverse order, which is often used in other applications and labeling.
Uses an extension of the 1-wire design from iButtonLink company that associated 1-wire physical connections with a unique 1-wire code. If the connection is behind a Link Locator the locator will show a unique 8-byte number (16 character hexidecimal) starting with family code FE.
If no Link Locator is between the device and the master, the locator field will be all FF.
r locator is the locator in reverse order.
Is the device currently present on the 1-wire bus?
Part name assigned by Dallas Semi. E.g. DS2401 Alternative packaging (iButton vs chip) will not be distiguished.
Each device is uniquely and unalterably numbered during manufacture. There are a wide variety of devices, including memory, sensors (humidity, temperature, voltage, contact, current), switches, timers and data loggers. More complex devices (like thermocouple sensors) can be built with these basic devices. There are also 1-wire devices that have encryption included.
The 1-wire scheme uses a single bus master and multiple slaves on the same wire. The bus master initiates all communication. The slaves can be individually discovered and addressed using their unique ID.
Bus masters come in a variety of configurations including serial, parallel, i2c, network or USB adapters.
Details of the individual slave or master design are hidden behind a consistent interface. The goal is to provide an easy set of tools for a software designer to create monitoring or control applications. There are some performance enhancements in the implementation, including data caching, parallel access to bus masters, and aggregation of device communication. Still the fundemental goal has been ease of use, flexibility and correctness rather than speed.
where 01 is an example 8-bit family code, and 12345678ABC is an example 48 bit address.
The dot is optional, and the CRC code can included. If included, it must be correct.
http://pdfserv.maxim-ic.com/en/ds/DS2433.pdf
20 [.]XXXXXXXXXXXX[XX][/[ PIO.[A-D|ALL] | volt.[A-D|ALL] | volt2.[A-D|ALL] ]]
20 [.]XXXXXXXXXXXX[XX][/[ 8bit/volt.[A-D|ALL] | 8bit/volt2.[A-D|ALL] ]]
20 [.]XXXXXXXXXXXX[XX][/[ memory | pages/page.[0-3|ALL] | power ]
20 [.]XXXXXXXXXXXX[XX][/[ alarm/high.[A-D|ALL] | alarm/low.[A-D|ALL] | set_alarm/high.[A-D|ALL] | set_alarm/low.[A-D|ALL] | set_alarm/unset | set_alarm/volthigh.[A-D|ALL] | set_alarm/volt2high.[A-D|ALL] | set_alarm/voltlow.[A-D|ALL] | set_alarm/volt2low.[A-D|ALL] ]
20 [.]XXXXXXXXXXXX[XX][/[ address | crc8 | id | locator | r_address | r_id | r_locator | type ]]
20 [.]XXXXXXXXXXXX[XX][/[ CO2/ppm | CO2/power | CO2/status ]
20
The alarm state of the voltage channel. The alarm state is set one of two ways:
32 bytes of data. Much has special implications. See the datasheet.
Memory is split into 4 pages of 8 bytes each. Mostly for reading and setting device properties. See the datasheet for details.
ALL is an aggregate of the pages. Each page is accessed sequentially.
Pins used for digital control. 1 turns the switch on (conducting). 0 turns the switch off (non-conducting).
Control is specifically enabled. Reading volt will turn off this control.
ALL is an aggregate of the voltages. Readings are made separately.
Is the DS2450 externally powered? (As opposed to parasitically powered from the data line).
The analog A/D will be kept on continuously. And the bus will be released during a conversion allowing other devices to communicate.
Set true (1) only if Vcc powered (not parasitically powered). Unfortunately, the DS2450 cannot sense it's powered state. This flag must be explicitly written, and thus is a potential source of error if incorrectly set.
It is always safe to leave power set to the default 0 (off) state.
Enabled status of the voltage threshold. 1 is on. 0 is off.
The upper or lower limit for the voltage measured before triggering an alarm.
Note that the alarm must be enabled alarm/high or alarm.low and an actual reading must be requested volt for the alarm state to actually be set. The alarm state can be sensed at alarm/high and alarm/low
Status of the power-on-reset (POR) flag.
The POR is set when the DS2450 is first powered up, and will match the alarm state until explicitly cleared. (By writing 0 to it).
The purpose of the POR is to alert the user that the chip is not yet fully configured, especially alarm thresholds and enabling.
Voltage read, 16 bit resolution (or 8 bit for the 8bit directory). Range 0 - 5.10V.
Output ( PIO ) is specifically disabled.
ALL is an aggregate of the voltages. Readings are made separately.
Voltage read, 16 bit resolution (or 8 bit for the 8bit directory). Range 0 - 2.55V.
Output ( PIO ) is specifically disabled.
ALL is an aggregate of the voltages. Readings are made separately.
Supply voltage to the CO2 sensor (should be around 5V)
CO2 level in ppm (parts per million). Range 0-5000.
Is the internal voltage correct (around 3.2V)?
The entire 64-bit unique ID. Given as upper case hexidecimal digits (0-9A-F).
address starts with the family code
r address is the address in reverse order, which is often used in other applications and labeling.
The 8-bit error correction portion. Uses cyclic redundancy check. Computed from the preceding 56 bits of the unique ID number. Given as upper case hexidecimal digits (0-9A-F).
The 8-bit family code. Unique to each type of device. Given as upper case hexidecimal digits (0-9A-F).
The 48-bit middle portion of the unique ID number. Does not include the family code or CRC. Given as upper case hexidecimal digits (0-9A-F).
r id is the id in reverse order, which is often used in other applications and labeling.
Uses an extension of the 1-wire design from iButtonLink company that associated 1-wire physical connections with a unique 1-wire code. If the connection is behind a Link Locator the locator will show a unique 8-byte number (16 character hexidecimal) starting with family code FE.
If no Link Locator is between the device and the master, the locator field will be all FF.
r locator is the locator in reverse order.
Is the device currently present on the 1-wire bus?
Part name assigned by Dallas Semi. E.g. DS2401 Alternative packaging (iButton vs chip) will not be distiguished.
Each device is uniquely and unalterably numbered during manufacture. There are a wide variety of devices, including memory, sensors (humidity, temperature, voltage, contact, current), switches, timers and data loggers. More complex devices (like thermocouple sensors) can be built with these basic devices. There are also 1-wire devices that have encryption included.
The 1-wire scheme uses a single bus master and multiple slaves on the same wire. The bus master initiates all communication. The slaves can be individually discovered and addressed using their unique ID.
Bus masters come in a variety of configurations including serial, parallel, i2c, network or USB adapters.
Details of the individual slave or master design are hidden behind a consistent interface. The goal is to provide an easy set of tools for a software designer to create monitoring or control applications. There are some performance enhancements in the implementation, including data caching, parallel access to bus masters, and aggregation of device communication. Still the fundemental goal has been ease of use, flexibility and correctness rather than speed.
where 01 is an example 8-bit family code, and 12345678ABC is an example 48 bit address.
The dot is optional, and the CRC code can included. If included, it must be correct.
43 [.]XXXXXXXXXXXX[XX][/[ memory | pages/page.[0-79|ALL] | address | crc8 | id | locator | r_address | r_id | r_locator | type ]]
23 DS28EC20
512 bytes of memory. Initially all bits are set to 1. Writing zero permanently alters the memory.
Memory is split into 80 pages of 32 bytes each. ALL is an aggregate of the pages. Each page is accessed sequentially.
The entire 64-bit unique ID. Given as upper case hexidecimal digits (0-9A-F).
address starts with the family code
r address is the address in reverse order, which is often used in other applications and labeling.
The 8-bit error correction portion. Uses cyclic redundancy check. Computed from the preceding 56 bits of the unique ID number. Given as upper case hexidecimal digits (0-9A-F).
The 8-bit family code. Unique to each type of device. Given as upper case hexidecimal digits (0-9A-F).
The 48-bit middle portion of the unique ID number. Does not include the family code or CRC. Given as upper case hexidecimal digits (0-9A-F).
r id is the id in reverse order, which is often used in other applications and labeling.
Uses an extension of the 1-wire design from iButtonLink company that associated 1-wire physical connections with a unique 1-wire code. If the connection is behind a Link Locator the locator will show a unique 8-byte number (16 character hexidecimal) starting with family code FE.
If no Link Locator is between the device and the master, the locator field will be all FF.
r locator is the locator in reverse order.
Is the device currently present on the 1-wire bus?
Part name assigned by Dallas Semi. E.g. DS2401 Alternative packaging (iButton vs chip) will not be distiguished.
Each device is uniquely and unalterably numbered during manufacture. There are a wide variety of devices, including memory, sensors (humidity, temperature, voltage, contact, current), switches, timers and data loggers. More complex devices (like thermocouple sensors) can be built with these basic devices. There are also 1-wire devices that have encryption included.
The 1-wire scheme uses a single bus master and multiple slaves on the same wire. The bus master initiates all communication. The slaves can be individually discovered and addressed using their unique ID.
Bus masters come in a variety of configurations including serial, parallel, i2c, network or USB adapters.
Details of the individual slave or master design are hidden behind a consistent interface. The goal is to provide an easy set of tools for a software designer to create monitoring or control applications. There are some performance enhancements in the implementation, including data caching, parallel access to bus masters, and aggregation of device communication. Still the fundemental goal has been ease of use, flexibility and correctness rather than speed.
All 1-wire devices are factory assigned a unique 64-bit address. This address is of the form:
where 01 is an example 8-bit family code, and 12345678ABC is an example 48 bit address.
The dot is optional, and the CRC code can included. If included, it must be correct.
http://datasheets.maxim-ic.com/en/ds/DS28EC20.pdf